Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)
- 1988.07a
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- Pages.510-513
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- 1988
The Performance Analysis of The Digital Trunk Circuit Processor in The TDX-1A
TDX-1A의 디지틀 중계선 정합 프로세서의 성능분석
- Ahn, Jee-Hwan (Electronics and Telecommunications Research Institute) ;
- Park, Kwang-Ro (Electronics and Telecommunications Research Institute) ;
- Lee, Yong-Kyun (Electronics and Telecommunications Research Institute)
- Published : 1988.07.01
Abstract
This paper describes an effective trunk loop signal processing method and analyzes execution time of program in the DTCP(Digital Trunk Circuit Processor) in the TDX-1A digital switching system. To predict a maximum trunk capacity, also analyzes to Z80A system clock(4Mbit/s, 2.5Mbit/s) and scanning period(8mS,5mS) respectively.
Keywords