• Title/Summary/Keyword: signal processor

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The Design of an Auto Tuning PI Controller using a Parameter Estimation Method for the Linear BLDC Motor (선형 추진 BLDC 모터에 대한 파라미터 추정 기법을 이용하는 오토 튜닝(Auto Tuning) PI 제어기 설계)

  • Cha Young-Bum;Song Do-Ho;Koo Bon-Min;Park Moo-Yurl;Kim Jin-Ae;Choi Jung-Keyng
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.4
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    • pp.659-666
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    • 2006
  • Servo-motors are used as key components of automated system by performing precise motion control as accurate positioning and accurate speed regulation in response to the commands from computers and sensors. Especially, the linear brushless servo-motors have numerous advantages over the rotary servo motors which have connection with the friction induced transfer mechanism such as ball screws, timing belts, rack/pinion. This paper proposes an estimation method of unknown motor system parameters using the informations from the sinusoidal driving type linear brushless DC motor dynamics and outputs. The estimated parameters can be used to tune the controller gain and a disturbance observer. In order to meet this purpose high performance Digital Signal Processor, TMS320F240, designed originally for implementation of a Field Oriented Control(FOC) technology is adopted as a controller of the liner BLDC servo motor. Having A/D converters, PWM generators, rich I/O port internally, this servo motor application specific DSP play an important role in servo motor controller. This linear BLDC servo motor system also contains IPM(Intelligent Power Module) driver and hail sensor type current sensor module, photocoupler module for isolation of gate signals and fault signals.

The Modified Direct Torque Control System for Five-Phase Induction Motor Drives (5상 유도전동기 구동을 위한 수정된 직접 토크제어 시스템)

  • Kim, Min-Huei;Kim, Nom-Hun;Baik, Won-Sik
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.23 no.2
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    • pp.138-147
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    • 2009
  • In this paper, improved direct torque control(DTC) system for five-phase squirrel-cage induction motor(IM) is proposed. Due to the additional degrees of freedom, five-phase 1M drives present unique characteristics. Also five-phase motor drives possess many other advantages compared with the traditional three-phase motor drive system, such as reducing an amplitude of torque pulsation and increasing the reliability. The DTC method is advantageous when it is applied to the five-phase IM, because the five-phase inverter provides 32 space vectors in comparison to 8 space voltage vectors into the three-phase inverter. However, five-phase motor has structural drawback of 3rd space-harmonics current component, it is necessary to controlled 3rd harmonic current. So to control 3rd harmonic current and enhance dynamic characteristics of five-phase squirrel-cage IM drive, modified DTC method should be demanded. The characteristics and dynamic performance of traditional five-phase DTC are analyzed and new DTC for five-phase IM is presented. A more precise flux and torque control algorithm for the drives can be suggested and explained For presenting the superior performance of the proposed direct torque control, experimental results are presented using a 32-[bit] fixed point TMS320F2812 digital signal processor with 2.2[kW] induction motor.

A Study On Radiation Detection Using CMOS Image Sensor (CMOS 이미지 센서를 사용한 방사선 측정에 관한 연구)

  • Lee, Joo-Hyun;Lee, Seung-Ho
    • Journal of IKEEE
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    • v.19 no.2
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    • pp.193-200
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    • 2015
  • In this paper, we propose the radiation measuring algorithm and the device composition using CMOS image sensor. The radiation measuring algorithm using CMOS image sensor is based on the radiation particle distinguishing algorithm projected to the CMOS image sensor and accumulated and average number of pixels of the radiation particles projected to dozens of images per second with CMOS image sensor. The radiation particle distinguishing algorithm projected to the CMOS image sensor measures the radiation particle images by dividing them into R, G and B and adjusting the threshold value that distinguishes light intensity and background from the particle of each image. The radiation measuring algorithm measures radiation with accumulated and average number of radiation particles projected to dozens of images per second with CMOS image sensor according to the preset cycle. The hardware devices to verify the suggested algorithm consists of CMOS image sensor and image signal processor part, control part, power circuit part and display part. The test result of radiation measurement using the suggested CMOS image sensor is as follows. First, using the low-cost CMOS image sensor to measure radiation particles generated similar characteristics to that from measurement with expensive GM Tube. Second, using the low-cost CMOS image sensor to measure radiation presented largely similar characteristics to the linear characteristics of expensive GM Tube.

Novel Radix-26 DF IFFT Processor with Low Computational Complexity (연산복잡도가 적은 radix-26 FFT 프로세서)

  • Cho, Kyung-Ju
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.1
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    • pp.35-41
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    • 2020
  • Fast Fourier transform (FFT) processors have been widely used in various application such as communications, image, and biomedical signal processing. Especially, high-performance and low-power FFT processing is indispensable in OFDM-based communication systems. This paper presents a novel radix-26 FFT algorithm with low computational complexity and high hardware efficiency. Applying a 7-dimensional index mapping, the twiddle factor is decomposed and then radix-26 FFT algorithm is derived. The proposed algorithm has a simple twiddle factor sequence and a small number of complex multiplications, which can reduce the memory size for storing the twiddle factor. When the coefficient of twiddle factor is small, complex constant multipliers can be used efficiently instead of complex multipliers. Complex constant multipliers can be designed more efficiently using canonic signed digit (CSD) and common subexpression elimination (CSE) algorithm. An efficient complex constant multiplier design method for the twiddle factor multiplication used in the proposed radix-26 algorithm is proposed applying CSD and CSE algorithm. To evaluate performance of the previous and the proposed methods, 256-point single-path delay feedback (SDF) FFT is designed and synthesized into FPGA. The proposed algorithm uses about 10% less hardware than the previous algorithm.

A ScanSAR Processing without Azimuth Stitching by Time-domain Cross-correlation (Azimuth Stitching 없는 ScanSAR 영상화: 시간영역 교차상관)

  • Won, Joong-Sun
    • Korean Journal of Remote Sensing
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    • v.38 no.3
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    • pp.251-263
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    • 2022
  • This paper presents an idea of ScanSAR image formation. For image formation of ScanSAR that utilizes the burst mode for raw signal acquisition, most conventional single burst methods essentially require a step of azimuth stitching which contributes to radiometric and phase distortions to some extent. Time-domain cross correlation could replace SPECAN which is most popularly used for ScanSAR processing. The core idea of the proposed method is that it is possible to relieve the necessity of azimuth stitching by an extension of Doppler bandwidth of the reference function to the burst cycle period. Performance of the proposed method was evaluated by applying it to the raw signals acquired by a spaceborne SAR system, and results satisfied all image quality requirements including 3 dB width, peak-to-sidelobe ratio (PSLR), compression ratio,speckle noise, etc. Image quality of ScanSAR is inferior to that of Stripmap in all aspects. However, it is also possible to improve the quality of ScanSAR image competitive to that of Stripmap if focused on a certain parameter while reduced qualities of other parameters. Thus, it is necessary for a ScanSAR processor to offer a great degree of flexibility complying with different requirements for different applications and techniques.

A Security SoC embedded with ECDSA Hardware Accelerator (ECDSA 하드웨어 가속기가 내장된 보안 SoC)

  • Jeong, Young-Su;Kim, Min-Ju;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.7
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    • pp.1071-1077
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    • 2022
  • A security SoC that can be used to implement elliptic curve cryptography (ECC) based public-key infrastructures was designed. The security SoC has an architecture in which a hardware accelerator for the elliptic curve digital signature algorithm (ECDSA) is interfaced with the Cortex-A53 CPU using the AXI4-Lite bus. The ECDSA hardware accelerator, which consists of a high-performance ECC processor, a SHA3 hash core, a true random number generator (TRNG), a modular multiplier, BRAM, and control FSM, was designed to perform the high-performance computation of ECDSA signature generation and signature verification with minimal CPU control. The security SoC was implemented in the Zynq UltraScale+ MPSoC device to perform hardware-software co-verification, and it was evaluated that the ECDSA signature generation or signature verification can be achieved about 1,000 times per second at a clock frequency of 150 MHz. The ECDSA hardware accelerator was implemented using hardware resources of 74,630 LUTs, 23,356 flip-flops, 32kb BRAM, and 36 DSP blocks.

Development and Field Test of the NEXTSat-2 Synthetic Aperture Radar (SAR) Antenna Onboard Vehicle (차세대소형위성 2호 영상 레이다 안테나 개발 및 차량 탑재 시험)

  • Shin, Goo-Hwan;Lee, Jung-Su;Jang, Tae Seong;Kim, Dong-Guk;Jung, Young-Bae
    • Journal of Space Technology and Applications
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    • v.1 no.1
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    • pp.33-40
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    • 2021
  • Based on the requirements of a total weight of 42 kg or less, the NEXTSat-2 SAR (synthetic aperture radar) system was developed. As the NEXTSat-2 is a small-sized satellite, the SAR system was designed to account for about 40% of the dry mass of the payload relative to the total mass. Among the major components of the SAR system - which are an antenna, an RF transceiver, a baseband signal processor, and a power unit - a part with a particularly large dry mass is the antenna, the core of the SAR system. Whereas various selections are possible in consideration of gain and efficiency when designing the antenna, the micro-strip patch array antenna was adopted by reflecting the dry mass, power, and resolution required by the NEXTSat-2 project. In order to meet the mission requirement of the NEXTSat-2, the antenna was developed with a frequency of 9.65 GHz, a gain of 42.7 dBi, and a return loss of -15 dB. The performance of the antenna was verified by conducting a field test onboard the vehicle.

Geoacoustic Inversion and Source Localization with an L-Shaped Receiver Array (L-자형 선배열을 이용한 지음향학적 인자 역산 및 음원 위치 추정)

  • Kim, Kyung-Seop;Lee, Keun-Hwa;Kim, Seong-Il;Kim, Young-Gyu;Seong, Woo-Jae
    • The Journal of the Acoustical Society of Korea
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    • v.25 no.7
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    • pp.346-355
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    • 2006
  • Acoustic data from a shallow water experiment in the East Sea of Korea (MAPLE IV) is Processed to investigate the Performance of matched-field geo-acoustic inversion and source localization. The receiver array consists of two legs as in an L-shape. one vertical and the other horizontal lying on the seabed. Narrowband multi-tone CW source was towed along a slightly inclined bathymetry track. The matched-field geo-acoustic inversion includes comparisons between three processing techniques. all based on the Bartlett processor as; (1) the coherent processing of the data from the full array, (2) the incoherent Product of each output from both the horizontal and vertical arrays, and (3) the cross correlation between the horizontal and vertical arrays. as well as processing each array leg separately. To verify the inversion results. matched-field source localization for low level source signal components were performed using the same Processors used at the inversion stage.

Development of a Listener Position Adaptive Real-Time Sound Reproduction System (청취자 위치 적응 실시간 사운드 재생 시스템의 개발)

  • Lee, Ki-Seung;Lee, Seok-Pil
    • The Journal of the Acoustical Society of Korea
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    • v.29 no.7
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    • pp.458-467
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    • 2010
  • In this paper, a new audio reproduction system was developed in which the cross-talk signals would be reasonably cancelled at an arbitrary listener position. To adaptively remove the cross-talk signals according to the listener's position, a method of tracking the listener position was employed. This was achieved using the two microphones, where the listener direction was estimated using the time-delay between the two signals from the two microphones, respectively. Moreover, room reverberation effects were taken into consideration where linear prediction analysis was involved. To remove the cross-talk signals at the left-and right-ears, the paths between the sources and the ears were represented using the KEMAR head-related transfer functions (HRTFs) which were measured from the artificial dummy head. To evaluate the usefulness of the proposed listener tracking system, the performance of cross-talk cancellation was evaluated at the estimated listener positions. The performance was evaluated in terms of the channel separation ration (CSR), a -10 dB of CSR was experimentally achieved although the listener positions were more or less deviated. A real-time system was implemented using a floating-point digital signal processor (DSP). It was confirmed that the average errors of the listener direction was 5 degree and the subjects indicated that 80 % of the stimuli was perceived as the correct directions.

Sound Engine for Korean Traditional Instruments Using General Purpose Digital Signal Processor (범용 디지털 신호처리기를 이용한 국악기 사운드 엔진 개발)

  • Kang, Myeong-Su;Cho, Sang-Jin;Kwon, Sun-Deok;Chong, Ui-Pil
    • The Journal of the Acoustical Society of Korea
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    • v.28 no.3
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    • pp.229-238
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    • 2009
  • This paper describes a sound engine of Korean traditional instruments, which are the Gayageum and Taepyeongso, by using a TMS320F2812. The Gayageum and Taepyeongso models based on commuted waveguide synthesis (CWS) are required to synthesize each sound. There is an instrument selection button to choose one of instruments in the proposed sound engine, and thus a corresponding sound is produced by the relative model at every certain time. Every synthesized sound sample is transmitted to a DAC (TLV5638) using SPI communication, and it is played through a speaker via an audio interface. The length of the delay line determines a fundamental frequency of a desired sound. In order to determine the length of the delay line, it is needed that the time for synthesizing a sound sample should be checked by using a GPIO. It takes $28.6{\mu}s$ for the Gayageum and $21{\mu}s$ for the Taepyeongso, respectively. It happens that each sound sample is synthesized and transferred to the DAC in an interrupt service routine (ISR) of the proposed sound engine. A timer of the TMS320F2812 has four events for generating interrupts. In this paper, the interrupt is happened by using the period matching event of it, and the ISR is called whenever the interrupt happens, $60{\mu}s$. Compared to original sounds with their spectra, the results are good enough to represent timbres of instruments except 'Mu, Hwang, Tae, Joong' of the Taepyeongso. Moreover, only one sound is produced when playing the Taepyeongso and it takes $21{\mu}s$ for the real-time playing. In the case of the Gayageum, players usually use their two fingers (thumb and middle finger or thumb and index finger), so it takes $57.2{\mu}s$ for the real-time playing.