• Journal of IKEEE
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• v.22 no.3
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• pp.786-792
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• 2018

A third-order sigma-delta modulator with the architecture of cascade of integrator feedback (CIFB) is proposed for an analog-digital converter used in low-power sensor interfaces. It consists of three switched-capacitor integrators using a gain-enhanced current-mirror-based amplifier, a single-bit comparator, and a non-overlapped clock generator. The proposed sigma-delta analog modulator with over-sampling ratio of 160 and maximum SNR of 90.45 dB is implemented using $0.11-{\mu}m$ CMOS process with 1.2-V supply voltage. The area and power consumption of the sigma-delta analog modulator are $0.145mm^2$ and $341{\mu}W$, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.8
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• pp.970-976
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• 2007

This paper presents a novel polar transmitter architecture with a 2-bit sigma-delta modulator. In the proposed architecture, the 2-bit sigma-delta modulator is introduced to suppress quantization noise of conventional sigma-delta modulator. The power amplifier configuration is also modified in a binary form to accommodate the 2-bit digitized envelope signal. The Ptolemy simulation results of the proposed structure show that the spectral property is greatly improved in full transmit band of EDGE system. The fine quantization scheme of the 2-bit modulator lowers the noise level by 10dB without increasing the over-sampling ratio, which may be obtained if the over-sampling ratio increases twofold. Dynamic range is also enhanced up to 5dB owing to the new form of the power amplifier in the transmitter.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.1
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• pp.8-16
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• 2020

In this paper, a single-bit 2nd-order delta-sigma modulator with the architecture of cascaded-of-integrator feedforward (CIFF) is proposed for column-parallel analog-to-digital converter (ADC) array used in a low noise CMOS image sensor. The proposed modulator implements two switched capacitor integrators and a single-bit comparator within only 10-㎛ column-pitch for column-parallel ADC array. Also, peripheral circuits for driving all column modulators include a non-overlapping clock generator and a bias circuit. The proposed delta-sigma modulator has been implemented in a 110-nm CMOS process. It achieves 88.1-dB signal-to-noise-and-distortion ratio (SNDR), 88.6-dB spurious-free dynamic range (SFDR), and 14.3-bit effective-number-of-bits (ENOB) with an oversampling ratio (OSR) of 418 for 12-kHz bandwidth. The area and power consumption of the delta-sigma modulator are 970×10 ㎛2 and 248 ㎼, respectively.

• Journal of the Korean Geotechnical Society
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• v.32 no.9
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• pp.17-27
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• 2016

Parial drainage characteristics of clayey silt with low plasticity from the west coast (Incheon and Hwaseong) was analyzed using CPTU based existing correlation equations and compulsory replacement method. Generally, the estimated $OCRs={\kappa}{\cdot}((q_t-{\sigma}_{vo})/{\sigma}^{\prime}_{vo})$ using Powell and Quartman(1988) were higher than those obtained by the oeodometer tests. These trends were noticeable for the layers containing a lot of silty and sand soils. The assessment of partial drainage conditions was performed through Schnaid et al. (2004)'s equation; it is based on plotting the normalized cone resistance, $Q_t$ versus the pore pressure parameter, $B_q$ in combination with the strength incremental ratio, $s_u/{\sigma}^{\prime}_{vo}$ to the CPTU data. It is evident that more than half of the data fall in the range where $B_q$ < 0.3, corresponding to the domain in which the partial drainage prevails when testing normally consolidated soils at a standard rate of penetration (2 cm/s). To estimate the replacement depth of clayey silt with low plasticity, back analysis was carried out to evaluate the internal friction angle based on where the design depths are equal to the checked depths using bearing capacity equation. The internal friction angels obtained from the back analysis tended to increase as the plasticity index decreases, which is ranged approximately from ${\varphi}^{\prime}=2^{\circ}$ to ${\varphi}^{\prime}=7^{\circ}$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.3
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• pp.438-445
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• 2017

This paper presents a low-power high-resolution band-pass ${\Sigma}{\Delta}$ ADC for accelerometer applications. The proposed band-pass ${\Sigma}{\Delta}$ ADC consists of a high-performance 6-th order feed-forward ${\Sigma}{\Delta}$ modulator with 1-bit quantization and a low-power, area-efficient digital filter. The ADC is fabricated in 180 nm 1P6M mixed-signal CMOS process with a die area of $5mm^2$. This high-resolution ADC got 90 dB peak signal to noise plus distortion ratio (SNDR) and 96 dB dynamic range (DR) over 4 kHz bandwidth, while the intermediate frequency (IF) is shifting from 100 KHz to 200 KHz. The power dissipation of the chip is 5.6 mW under 1.8 V (digital)/3.3 V (analog) power supply.

• The Pure and Applied Mathematics
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• v.13 no.3 s.33
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• pp.189-195
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• 2006

Let R be a prime ring with characteristics not 2 and ${\sigma},\;{\tau},\;{\alpha},\;{\beta}$ be auto-morphisms of R. Suppose that $d_1$ is a (${\sigma},\;{\tau}$)-derivation and $d_2$ is a (${\alpha},\;{\beta}$)-derivation on R such that $d_{2}{\alpha}\;=\;{\alpha}d_2,\;d_2{\beta}\;=\;{\beta}d_2$. In this note it is shown that; (1) If $d_1d_2$(R) = 0 then $d_1$ = 0 or $d_2$ = 0. (2) If [$d_1(R),d_2(R)$] = 0 then R is commutative. (3) If($d_1(R),d_2(R)$) = 0 then R is commutative. (4) If $[d_1(R),d_2(R)]_{\sigma,\tau}$ = 0 then R is commutative.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.52-58
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• 2009

A low voltage, low power delta-sigma modulator is proposed for cardiac pacemaker applications. A cascade of delta-sigma modulator stages that employ a feedforward topology has been used to implement a high-resolution oversampling ADC under the low supply. An inverter-based switched-capacitor circuit technique is used for low-voltage operation and ultra-low power consumption. An experimental prototype of the proposed circuit has been implemented in a $0.35-{\mu}m$ CMOS process, and it achieves 61-dB SNDR, 63-dB SNR, and 65-dB DR for a 120-Hz signal bandwidth at 7.6-kHz sampling frequency. The power consumption is only 280 nW at 1-V power supply.

• Communications of the Korean Mathematical Society
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• v.9 no.3
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• pp.701-710
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• 1994

Suppose ${X_n}$ is a Markov process taking values in some arbitrary space $(S, \varphi)$ with n-stemp transition probability $$ P^{(n)}(x, B) = Prob(X_n \in B$\mid$X_0 = x), x \in X, B \in \varphi.$$ We shall call a Markov process with transition probabilities $P{(n)}(x, B)$ $\phi$-irreducible for some non-trivial $\sigma$-finite measure $\phi$ on $\varphi$ if whenever $\phi(B) > 0$, $$ \sum^{\infty}_{n=1}{2^{-n}P^{(n)}}(x, B) > 0, for every x \in S.$$ A non-trivial $\sigma$-finite measure $\pi$ on $\varphi$ is called invariant for ${X_n}$ if $$ \int{P(x, B)\pi(dx) = \pi(B)}, B \in \varphi $$.

• Bulletin of the Society of Naval Architects of Korea
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• v.7 no.1
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• pp.37-44
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• 1970

The plate under shear loading umformly distributed on the end portions of its side boundary was considered. Infinite hyperbolic serieses and Fourier serieses were combined as a stress function and from which exact solutions for the 15 cases for the parameters of b/L=0.25, 0.5, 1.0 and l/L=0.2, 0.4, 0.6, 0.8, 1.0 are obtained. In each cases the first 5 terms of the infinite series at the 36 points as shown in Fig. 3. The results are presented in Fig. 4-1, 4-2, and 4-3. The conclusions are as follows: 1) The stresses ${\sigma}_x$ increase very slightly as $\chi$ increases in the range of 0<x<L-l 2) When the parameters satisfy the conditions b/L<0.25 and l/L<0.2, the stresses in the region of 0<x<L-l can be obtained by replacing the uniform shear loading by the equivalent uniform shear loading by the equivalent uniform tensile force and pure bending moment at x=l. 3) The stress ${\sigma}_y$ is negligible throughout the region. 4) When the parameter b/L varies, the stresses ${\sigma}_x$ and u vary as L/b, while strain $\upsilon$ varies as $(L/b)^2$.

• Communications of the Korean Mathematical Society
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• v.33 no.3
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• pp.889-899
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• 2018

In this paper, we present some upper bounds for unitarily invariant norms inequalities. Among other inequalities, we show some upper bounds for the Hilbert-Schmidt norm. In particular, we prove $${\parallel}f(A)Xg(B){\pm}g(B)Xf(A){\parallel}_2{\leq}{\Large{\parallel}}{\frac{(I+{\mid}A{\mid})X(I+{\mid}B{\mid})+(I+{\mid}B{\mid})X(I+{\mid}A{\mid})}{^dA^dB}}{\Large{\parallel}}_2$$, where A, B, $X{\in}{\mathbb{M}}_n$ such that A, B are Hermitian with ${\sigma}(A){\cup}{\sigma}(B){\subset}{\mathbb{D}}$ and f, g are analytic on the complex unit disk ${\mathbb{D}}$, g(0) = f(0) = 1, Re(f) > 0 and Re(g) > 0.