• Title/Summary/Keyword: shifters

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Compact Metamaterial-Based Tunable Phase Shifter at 2.4 GHz

  • Jung, Youn-Kwon;Lee, Bomson
    • Journal of electromagnetic engineering and science
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    • v.13 no.2
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    • pp.137-139
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    • 2013
  • A compact metamaterial (MTM)-based tunable phase shifter consisting of four unit cells with a simple DC bias circuit has been designed at 2.4 GHz. The variable series capacitors and shunt inductors that are required to be loaded periodically onto a host transmission line are realized employing only chip variable capacitors (varactors). In addition, the proposed phase shifter requires only one DC bias source to control the varactors, with the matching condition of the MTM line automatically satisfied. The measured phase shifting range is $285.2^{\circ}$ (from $-74.2^{\circ}$ to $211^{\circ}$). The measured insertion loss is approximately 1.5 dB. The circuit/electromagnetic-simulated and measured results are in good agreement.

Adaptive Calibration Method in Multiport Amplifier for K-Band Payload Applications

  • Moon, Seong-Mo;Shin, Dong-Hwan;Lee, Hong-Yul;Uhm, Man-Seok;Yom, In-Bok;Lee, Moon-Que
    • ETRI Journal
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    • v.35 no.4
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    • pp.718-721
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    • 2013
  • This letter proposes a novel calibration method for a multiport amplifier (MPA) to achieve optimum port-to-port isolation by correcting both the amplitude and phase of the calibration signals. The proposed architecture allows for the detection of the phase error and amplitude error in each RF signal path simultaneously and can enhance the calibrated resolution by controlling the analog phase shifters and attenuators. The designed $2{\times}2$ and $4{\times}4$ MPAs show isolation characteristics of 30 dB and 27 dB over a frequency range of 19.5 GHz to 22.5 GHz, respectively.

4×4 Broadband Phased Array Antenna Using LHTL Based Phase Shifter (LHTL 위상변위기를 이용한 4×4 광대역 위상배열안테나)

  • Park, Soonwoo;Kim, Hongjoon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.2
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    • pp.379-382
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    • 2017
  • This paper proposes a $4{\times}4$ broadband phased array antenna using a Left-Handed Transmission Line (LHTL) based phase shifter. The phased array is constructed with sixteen quasi-Yagi antenna elements and the phase shifters, as well as four power dividers. A key component of the system, the LHTL based phase shifter is able to control a phase delay of incident waves linearly and continuously. The fabricated phased array antenna operate for a frequency range of 800 MHz (1.6 GHz~2.4 GHz). The beam scanning range of the $4{\times}4$ array antenna is ${\pm}27^{\circ}$ horizontally and vertically while the antenna gain is maintained with a variation of ${\pm}1.4dBi$.

The Development of a Beam Steering System for X-band 2-D Phased Array Antenna (X-대역 2차원 위상배열안테나 빔조향 시스템 개발)

  • Kim, Doo-Soo
    • Journal of the Korea Institute of Military Science and Technology
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    • v.11 no.4
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    • pp.92-98
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    • 2008
  • A beam steering system of X-band 2-D phased array antenna for radar application is developed. The beam steering system consists of real-time command generator, beam steering unit, control PCB of array module and power supply. It plays a role of beam steering and on-line check of phased array antenna. The performance of beam steering system is verified with pulse timing of current control in phase shifters and measurement of far-field of phased array antenna. The developed beam steering system offers basic technology to develop full-scale beam steering system of multi-function radar.

Multi-Symbol Binary Arithmetic Coding Algorithm for Improving Throughput in Hardware Implementation

  • Kim, Jin-Sung;Kim, Eung Sup;Lee, Kyujoong
    • Journal of Multimedia Information System
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    • v.5 no.4
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    • pp.273-276
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    • 2018
  • In video compression standards, the entropy coding is essential to the high performance compression because redundancy of data symbols is removed. Binary arithmetic coding is one of high performance entropy coding methods. However, the dependency between consecutive binary symbols prevents improving the throughput. For the throughput enhancement, a new probability model is proposed for encoding multi-symbols at one time. In the proposed method, multi-symbol encoder is implemented with only adders and shifters, and the multiplication table for interval subdivision of binary arithmetic coding is removed. Compared to the compression ratio of CABAC of H.264/AVC, the performance degradation on average is only 1.4% which is negligible.

Design of a Low Phase Noise Voltage Tuned Planar Composite Resonator Oscillator Using SIW Structure (SIW 구조를 이용한 저 위상잡음 전압 제어 평판형 복합공진기 발진기 설계)

  • Lee, Dong-Hyun;Son, Beom-Ik;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.25 no.5
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    • pp.515-525
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    • 2014
  • In this paper, we present a design and implementation of a Voltage-tuned Planar Composite Resonator Oscillator(Vt-PCRO) with a low phase noise. The designed Vt-PCRO is composed of a resonator, two phase shifters, and an amplifier. The resonator is designed using a dual mode SIW(Substrate Integrated Waveguide) resonator and has a group delay of about 40 nsec. Of the two phase shifters (PS1 and PS2), PS1 with a phase shift of $360^{\circ}$ is used for the open loop gain to satisfy oscillation condition without regard to the electrical lengths of the employed microstrip lines in the loop. PS2 with a phase shift of about $70^{\circ}$ is used to tune oscillation frequency. The amplifier is constructed using two stages to compensate for the loss of the open loop. Through the measurement of the open loop gain, the tune voltage of the PS1 can be set to satisfy the oscillation condition and the loop is then closed to form the oscillator. The oscillator with a oscillation frequency of 5.345 GHz shows a phase noise of -130.5 dBc/Hz at 100 kHz frequency offset. The oscillation power and the electrical frequency tuning range is about 3.5 dBm and about 4.2 MHz for a tuning voltage of 0~10 V, respectively.

Pseudo Random Pattern Generator based on phase shifters (페이지 쉬프터 기반의 의사 난수 패턴 생성기)

  • Cho, Sung-Jin;Choi, U-Sook;Hwang, Yoon-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.3
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    • pp.707-714
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    • 2010
  • Since an LFSR(linear feedback shift register) as a pattern generator has solely linear dependency in itself, it generates sequences by moving the bit positions for pattern generation. So the correlation between the generated patterns is high and thus reduces the possibility of fault detection. To overcome these problems many researchers studied to have goodness of randomness between the output test patterns. In this paper, we propose the new and effective method to construct phase shifter as PRPG(pseudo random pattern generator).

Minimizing Design of the Schiffman Phase Shifter Using the Defected Ground Structure (결함접지면을 이용한 쉬프만 위상 천이기의 소형화)

  • Kim, Gi-Rae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.9
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    • pp.1745-1752
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    • 2009
  • This Paper represents a new method, which uses defected ground structure (DGS) on the ground planes of microstrip lines, to reduce the size of the Schiffman phase shifter. DGS on the microstrip line shows an increased slow-wave effect due to the additional equivalent L and C components. So the electrical length of transmission line with DGS is longer than that of standard transmission line for the same physical length. Then, the length of transmission line with DGS can be shortened in order to maintain the original electrical length to be same. The performances of reduced phase shifter with DGS are quite similar to the ones of original Schiffman phase shifters. We can reduce the size about 15% using the DGS in original Schiffman phase shifter.

Design of A 10-Bit Data Driving Circuit for HDTV/XGA AMOLED Displays (HDTV/XGA AMOLED 디스플레이를 위한 10 비트 데이터 구동 회로의 설계)

  • Kim, Yong-Uk;Lee, Ju-Sang;Yu, Sang-Dae
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.797-800
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    • 2005
  • In this paper, the designed 10-bit current steering data driving circuit consists of bias circuits, shift registers, data and line latches, level shifters, and 10-bit D/A converters. This data driving circuit can improve image quality, driving speed, and can reduce process error, DNL error, and glitch noise. To reduce current cells, the 10-bit D/A converter was designed 3+3+4 hybrid type. As a result 49 current cells are decreased. The transient analysis shows that currents flows a few of mA in data line and the currents have 1024 gray levels of current values. Total circuits are designed for 10 ${\mu}s$ speed. Thus the designed 10-bit current steering data driving circuit can be usable in HDTV/XGA AMOLED displays. These data driving circuits are designed for 0.35 ${\mu}m$ CMOS process at 3.3 V and 18 V supply voltage and simulated with HSPICE..

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Design and Implementation of Flux-Driven Waveguide Ferrite Phase Shifters (자속밀도 제어형 페라이트 도파관 변위기 설계 및 제작)

  • 김동석;박동철;이용희;김윤명
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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    • v.3 no.1
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    • pp.3-10
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    • 1992
  • Flux-drive waveguide phase shifter is designed by twin-slab model. Measured differential phase shifts are smaller than the theoretical values by 8-9 percents. Measured insertion loss and VSWR of the phase shifter using TT73-2200 ferite are less than 0.45dB and 1.25 respectively, within pass band. The phase shifter using double-setup transformer shows wider bandwidth characteristics. Finally the reduced-height waveguide phase shifter using TT3-2900 ferrite shows very efficient suppression of higher-oreder modes.

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