• IE interfaces
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• v.11 no.3
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• pp.65-75
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• 1998

This research considers the problem of scheduling jobs on parallel machines with non-common due dates and additional resource constraints. The objective is to minimize the total absolute deviation of job completion times about the due dates. Job processing times are assumed to be the same. This problem is motivated by restrictions that occur in the handling and processing of jobs in certain phases of semiconductor manufacturing and other production systems. We examine two problems. For the first of these, the number of different types of additional: resources and resource requirements per job are arbitrary. The problem is formulated as a zero-one integer linear programming and the Lagrangian relaxation approach is used. For the second case, there exists one single type of additional resource and the resource requirements per job are zero or one. We show how to formulate the problem as an assignment problem.

• KIPS Transactions on Computer and Communication Systems
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• v.10 no.7
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• pp.205-214
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• 2021

For smart manufacturing, most semiconductor sites utilize automated material handling systems(AMHS). As one of the AMHSs, the OHT control system(OCS) manages overhead hoist transports(OHT) that move along rails installed on the ceiling. This paper proposes a real-time scheduling system to efficiently allocate and control the OHTs in semiconductor logistics processes. The proposed system, as an independent subsystem within the OCS, is interconnected with the main subsystem of the OCS, so that it can be easily modified without the effect of other systems. To develop the system, we first identify the functional requirements of the semiconductor logistics process and classify several types of control scenarios of the OHTs. Next, based on SEMI(Semiconductor Equipment and Materials International) standard, we design sequence diagrams and interface messages between the subsystems. The developed system is interoperated with the OCS main subsystem and the database in real time and performs two major roles: 1) OHT dispatching and 2) pathfinding. Six integrated tests were carried out to verify the functions of the developed system. The system was normally operated on six basic scenarios and two exception scenarios and we proved that it is suitable for the mission planning of the OHTs.

• Proceedings of the KIEE Conference
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• 1998.07g
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• pp.2390-2392
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• 1998

In this paper, we discuss the development of monitoring system with data process equipment which transfers data from Remote Terminal Unit(RTU) to monitoring computer. The RTUs sense temperature, pressure and PLC(Programmable Logic Controller) nodes conditions of scrubber in semiconductor manufacture processing. The data Process equipment is connected every RTU and a monitoring computer through serial communication. This equipment receives informations from RTU, process data, and transfers them to monitoring computer. To avoid congestion in data communication, task scheduling algorithm used RT O/S(Real-Time Operating System) is embedded in ROM which is a part of data Process equipment.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.1
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• pp.37-41
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• 2018

In this paper, we evaluate the power consumption of IEEE802.15.4e TSCH which uses the specific link scheduling scheme proposed in reference[1]. And we also compares it with the power consumption of conventional single channel IEEE802.15.4. The power consumption of IEEE802.15.4e TSCH is smaller than the conventional one under the any conditions of traffic. The reasons can be explained as the followings. Firstly, TSCH does not have backoff time because of using the collision free link scheduling. Secondly, there is the timing difference of MAC offset parameter between TSCH and conventional IEEE802.15.4 Lastly, the devices in TSCH mode sleep during the time slots which are not assigned to itself.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.7
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• pp.29-35
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• 2017

This paper presents a high-throughput area-efficient mixed-radix fast Fourier transform (FFT) processor using the efficient scheduling schemes. The proposed FFT processor can support 64, 128, 256, and 512-point FFTs for orthogonal frequency division multiplexing (OFDM) systems, and can achieve a high throughput using mixed-radix algorithm and eight-parallel multipath delay commutator (MDC) architecture. This paper proposes new scheduling schemes to reduce the size of read-only memories (ROMs) and complex constant multipliers without increasing delay elements and computation cycles; thus, reducing the hardware complexity further. The proposed mixed-radix MDC FFT processor is designed and implemented using the Samsung 65nm complementary metal-oxide semiconductor (CMOS) technology. The experimental result shows that the area of the proposed FFT processor is 0.36 mm2. Furthermore, the proposed processor can achieve high throughput rates of up to 2.64 GSample/s at 330 MHz.

• The Journal of Society for e-Business Studies
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• v.24 no.3
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• pp.99-110
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• 2019

As the 4th industrial revolution progressing, manufacturers are trying to apply intelligent information technologies such as IoT(internet of things) and machine learning. In the semiconductor/LCD/tire manufacturing process, schedule plan that minimizes setup change and due date violation is very important in order to ensure efficient production. Therefore, in this paper, we suggest the deep learning based scheduling generation model minimizes setup change and due date violation in parallel machines. The proposed model learns patterns of minimizing setup change and due date violation depending on considered order using the amount of historical data. Therefore, the experiment results using three dataset depending on levels of the order list, the proposed model outperforms compared to priority rules.

• IE interfaces
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• v.21 no.2
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• pp.229-236
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• 2008

Recently, ubiquitous computing paradigm considers as a tool for making innovation and competitive strength in manufacturing industry like other industries. Particularly, the location-based service that enables us to trace real-time logistics make effective management of schedules for inventory control, facilities and equipments, jobs planning, and facilitate the processes of information management and intelligence, which relate with ERP and SCM in organizations. Our study tries to build the location-based system for products of semiconductors in manufacturing place and suggests the good conditions and effective tracking procedures for positions of products. Our study show that the system is good for the saving of time in tracking products, however, it has to be improved in terms of accuracy. The study verifies the application of RFID technology in manufacturing industry and suggests the improvement of photograph process through RFID. In addition, our research introduces the future operation of FAB in semiconductors' processes that relate with real-time automation and RFID in manufacturing company.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.38 no.4
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• pp.159-167
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• 2015

We consider a wafer lot transfer/release planning problem from semiconductor wafer fabrication facilities to probing facilities with the objective of minimizing the deviation of workload and total tardiness of customers' orders. Due to the complexity of the considered problem, we propose a two-level hierarchical production planning method for the lot transfer problem between two parallel facilities to obtain an executable production plan and schedule. In the higher level, the solution for the reduced mathematical model with Lagrangian relaxation method can be regarded as a coarse good lot transfer/release plan with daily time bucket, and discrete-event simulation is performed to obtain detailed lot processing schedules at the machines with a priority-rule-based scheduling method and the lot transfer/release plan is evaluated in the lower level. To evaluate the performance of the suggested planning method, we provide computational tests on the problems obtained from a set of real data and additional test scenarios in which the several levels of variations are added in the customers' demands. Results of computational tests showed that the proposed lot transfer/planning architecture generates executable plans within acceptable computational time in the real factories and the total tardiness of orders can be reduced more effectively by using more sophisticated lot transfer methods, such as considering the due date and ready times of lots associated the same order with the mathematical formulation. The proposed method may be implemented for the problem of job assignment in back-end process such as the assignment of chips to be tested from assembly facilities to final test facilities. Also, the proposed method can be improved by considering the sequence dependent setup in the probing facilities.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.4
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• pp.286-292
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• 2004

In this paper we present a static performance estimation technique of on-chip bus architectures. The proposed technique requires the static scheduling of function blocks of a task to analyze bus conflicts caused by simultaneous accesses from processing elements to which function blocks are mapped. To apply it to multitask applications, the concurrent execution of the function blocks of different tasks also should be considered. Since tasks are scheduled independently, considering all cases of concurrency in each processing element is impractical. Therefore we make an average estimate on the effects of other tasks with respect to bus request rate and bus access time. The proposed technique was incorporated with our exploration framework for on-chip bus architectures, Its viability and efficiency are validated by a preliminary example.

• IE interfaces
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• v.10 no.1
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• pp.57-65
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• 1997

Less researches on AGV(Automated Guided Vehicle) path configurations have been conducted so far while more studies have been placed in determining AGV guide path directions and pick-up/drop-off station locations, and routing/dispatching/scheduling strategies. In practice plenty of concerns fall in preventing deadlock and simplifying AGV system control through an appropriate AGV path configuration. In order to meet those requirements, a new AGV path configuration, inter-loop stocker type is introduced here. The stocker serves as relaying material between loops as well as stocking material. Automated material handling systems using AGVs play an important role in semiconductor industry including TFT LCD and memory/non-memory chip. A practical example of implementing the inter-loop stocker concept successfully in the TFT LCD fab is presented in this paper.