• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.3
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• pp.182-189
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• 2011

In this work, a tunneling field-effect transistor (TFET) based on heterojunctions of compound and Group IV semiconductors is introduced and simulated. TFETs based on either silicon or compound semiconductors have been intensively researched due to their merits of robustness against short channel effects (SCEs) and excellent subthreshold swing (SS) characteristics. However, silicon TFETs have the drawback of low on-current and compound ones are difficult to integrate with silicon CMOS circuits. In order to combine the high tunneling efficiency of narrow bandgap material TFETs and the high mobility of III-V TFETs, a Type-I heterojunction tunneling field-effect transistor (I-HTFET) adopting $Ge-Al_xGa_{1-x}As-Ge$ system has been optimized by simulation in terms of aluminum (Al) composition. To maximize device performance, we considered a nanowire structure, and it was shown that high performance (HP) logic technology can be achieved by the proposed device. The optimum Al composition turned out to be around 20% (x=0.2).

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.407-407
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• 2014

Nanotechnology, especially vertically grown silicon nanowires, has gotten great attentions in biology due to characteristics of one dimensional nanostructure; controllable synthetic structure such as lengths, diameters, densities. Silicon nanowires are promising materials as nanoelectrodes due to their highly complementary metal-oxide-semiconductor (CMOS) - and bio-compatibility. Silicon nanowires are so intoxicated that are effective for bio molecular delivery and electrical stimulation. Vertical nanowires with integrated Au tips were fabricated for electrical intracellular interfacing with PC-12 cells. We have made synthesized two types of nanowire devices; one is multi-nanowires electrode for bio molecular sensing and electrical stimulation, and the other is single-nanowires electrode respectively. Here, we demonstrate that differentiation of Nerve Growth Factor (NGF) treated PC-12 cells can be promoted depending on different magnitudes of electrical stimulation and density of Si NWs. It was fabricated by both bottom-up and top-down approaches using low pressure chemical vapor deposition (LPCVD) with high vacuuming environment to electrically stimulate PC-12 cells. The effects of electrical stimulation with NGF on the morphological differentiation are observed by Scanning Electron Microscopy (SEM), and it induces neural outgrowth. Moreover, the cell cytosol can be dyed selectively depending on the degree of differentiation along with fluorescence microscopy measurement. Vertically grown silicon nanowires have further expected advantages in case of single nanowire fabrication, and will be able to expand its characteristics to diverse applications.

• ETRI Journal
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• v.41 no.6
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• pp.829-837
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• 2019

The p-type nanowire field-effect transistor (FET) with a SiGe shell channel on a Si core is optimally designed and characterized using in-depth technology computer-aided design (TCAD) with quantum models for sub-10-nm advanced logic technology. SiGe is adopted as the material for the ultrathin shell channel owing to its two primary merits of high hole mobility and strong Si compatibility. The SiGe shell can effectively confine the hole because of the large valence-band offset (VBO) between the Si core and the SiGe channel arranged in the radial direction. The proposed device is optimized in terms of the Ge shell channel thickness, Ge fraction in the SiGe channel, and the channel length (L_g) by examining a set of primary DC and AC parameters. The cutoff frequency (f_T) and maximum oscillation frequency (f_max) of the proposed device were determined to be 440.0 and 753.9 GHz when L_g is 5 nm, respectively, with an intrinsic delay time (τ) of 3.14 ps. The proposed SiGe-shell channel p-type nanowire FET has demonstrated a strong potential for low-power and high-speed applications in 10-nm-and-beyond complementary metal-oxide-semiconductor (CMOS) technology.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.2
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• pp.21-32
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• 2023

CuNWs(Copper nanowires) are attracting attention as a transparent electrode material because of their excellent electrical conductivity, high mechanical flexibility, and cost-effectiveness. However, since copper nanowires are easily oxidized, there is a disadvantage that properties of the transparent electrode may be deteriorated due to this, and researches are being conducted to improve this. Accordingly, in this review, various methods and studies to prevent oxidation and improve stability of copper nanowire transparent electrodes by using coating materials such as carbon-based materials, metals, and conductive polymers are introduced. Through this, we intend to provide solutions to solve the problem of development and oxidation of copper nanowire-based technology.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.10
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• pp.14-22
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• 2010

The source/channel/drain regions are formed by ion implantation with different dopant types of $n^+/p^{(+)}/n^+$ in the fabrication of the conventional n-type metal-oxide-semiconductor field effect transistor(NMOSFET). In implementing the ultra-small devices with channel length of sub-30 nm, in order to achieve the designed effective channel length accurately, low thermal budget should be considered in the fabrication processes for minimizing the lateral diffusion of dopants although the implanted ions should be activated as completely as possible for higher on-current level. Junctionless (JL) MOSFETs fully capable of the the conventional NMOSFET operations without p-type channel for enlarging the process margin are under researches. In this paper, the optimum design of the JL MOSFET based on silicon nanowire (SNW) structure is carried out by 3-D device simulation and the basic radio frequency (RF) characteristics such as conductance, maximum oscillation frequency($f_{max}$), current gain cut-off frequency($f_T$) for the optimized device. The channel length was 30 run and the design variables were the channel doping concentration and SNW radius. For the optimally designed JL SNW NMOSFET, $f_T$ and $f_{max}$ high as 367.5 GHz and 602.5 GHz could be obtained, respectively, at the operating bias condition $V_{GS}$ = $V_{DS}$ = 1.0 V).

• Polymer Science and Technology
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• v.21 no.6
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• pp.512-518
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• 2010

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.117-117
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• 2012

Si:Ge alloy semiconductor nanocrystals (NCs) offer challenging opportunities for integrated optoelectronics/optoplasmonics, since they potentially allow unprecedentedly strong light-matter interaction in the wavelength range of the optical communication. In this talk, we discuss the recent research efforts of my laboratory to develop optoelectronic components based on individual group IV NCs. We present experimental demonstration of the individual NC optoelectronic devices, including broadband Si:Ge nanowire (NW) photodetectors, intra NW p-n diodes, Ge NC electrooptical modulators and near-field plasmonic NW detectors, where the unique size effects at the nanometer scales commonly manifest themselves. In particular, we demonstrated a scanning photocurrent imaging technique to investigate dynamics of photocarriers in individual Si:Ge NWs, which provides spatially and spectrally resolved local information without ensemble average. Our observations represent inherent size-effects of internal gain in semiconductor NCs, thereby provide a new insight into nano optoplasmonics.

• Journal of the Semiconductor & Display Technology
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• v.17 no.2
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• pp.1-5
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• 2018

Elastic resistive pressure sensor is fabricated by a direct spray coating of silver nanowires (AgNWs) on uncured polydimethylsiloxane (PDMS) and an additional coating of a conductive polymer, poly(3,4-ethylenedioxythiophene): poly (styrene sulfonate) (PEDOT:PSS). To improve the sensitive and stability, we have fabricated sandwich-structured AgNW/polymer sensor where two AgNW/polymer-coated PDMS films are laminated with the conducting surfaces contacted by pressure lamination. It shows a resistance decrease upon loading due to the formation of dense network of AgNWs. It is demonstrated that the sandwich-structured AgNW/polymer sensor exhibits very high sensitivity ($2.59kPa^{-1}$) and gauge factor (37.8) in the low pressure regime. It can also detect a subtle placement and removal of a weight as low as 3.4 mg, the corresponding pressure of which is about 5.4 Pa. It is shown that the protrusion of AgNWs from PDMS is suppressed substantially by the over-coated PEDOT:PSS layer, thereby reducing hysteresis and rendering the sensor more stable.

• Journal of the Semiconductor & Display Technology
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• v.19 no.4
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• pp.6-10
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• 2020

The silver nanowires (AgNWs) were synthesized by the conventional polyol process, which revealed 25 ㎛ and 30 nm of average length and diameter, respectively. The synthesized AgNWs were applied to the CdSe/CdZnS quantum dot (QD) based transparent light-emitting device (LED). The device using a randomly networked AgNWs electrode had some problems such as the high threshold voltage (for operating the device) due to the random pores from the networked AgNWs. As a method of improvement, a composite electrode was formed by overlaying the ZnO:Ga on the AgNWs network. The device used the composite electrode revealed a low threshold voltage (4.4 Vth) and high current density compared to the AgNWs only electrode device. The brightness and current density of the device using composite electrode were 55.57 cd/㎡ and 41.54 mA/㎠ at the operating voltage of 12.8 V, respectively, while the brightness and current density of the device using (single) AgNWs only were 1.71 cd/㎡ and 2.05 mA/㎠ at the same operating voltage. The transmittance of the device revealed 65 % in a range of visible light. Besides the reliability of the devices was confirmed that the device using the composite electrode revealed 2 times longer lifetime than that of the AgNWs only electrode device.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.245-245
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• 2009

l-D nanostructured materials have much more attention because of their outstanding properties and wide applicability in device fabrication. Copper oxide(CuO) has been realized as a p-type metal oxide semiconductor with narrow band gap of 1.2 -1.5eV. Copper oxide nanostructures can be synthesized by various growth method such as oxidation reaction, thermal evaporation thermal decomposition, sol-gel. and Mostly CuO nanowire prepared on the Cu substrate such as Copper foil, grid, plate. In this study, CuO NWs were grown by thermal oxidation (at various temperatures in air (1 atm)) of Cu metal deposited on CuO (20nm)/$SiO_2$(250nm)/Si. A 20nm-thick CuO layer was used as an adhesion layer between Cu metal and $SiO_2$