• 제목/요약/키워드: semiconductor manufacturing process

검색결과 561건 처리시간 0.031초

LIME을 활용한 준지도 학습 기반 이상 탐지 모델: 반도체 공정을 중심으로 (Anomaly Detection Model Based on Semi-Supervised Learning Using LIME: Focusing on Semiconductor Process)

  • 안강민;신주은;백동현
    • 산업경영시스템학회지
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    • 제45권4호
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    • pp.86-98
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    • 2022
  • Recently, many studies have been conducted to improve quality by applying machine learning models to semiconductor manufacturing process data. However, in the semiconductor manufacturing process, the ratio of good products is much higher than that of defective products, so the problem of data imbalance is serious in terms of machine learning. In addition, since the number of features of data used in machine learning is very large, it is very important to perform machine learning by extracting only important features from among them to increase accuracy and utilization. This study proposes an anomaly detection methodology that can learn excellently despite data imbalance and high-dimensional characteristics of semiconductor process data. The anomaly detection methodology applies the LIME algorithm after applying the SMOTE method and the RFECV method. The proposed methodology analyzes the classification result of the anomaly classification model, detects the cause of the anomaly, and derives a semiconductor process requiring action. The proposed methodology confirmed applicability and feasibility through application of cases.

스마트제조시스템의 설비인자 분석 (Analysis of Equipment Factor for Smart Manufacturing System)

  • 안재준;심현식
    • 반도체디스플레이기술학회지
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    • 제21권4호
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    • pp.168-173
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    • 2022
  • As the function of a product is advanced and the process is refined, the yield in the fine manufacturing process becomes an important variable that determines the cost and quality of the product. Since a fine manufacturing process generally produces a product through many steps, it is difficult to find which process or equipment has a defect, and thus it is practically difficult to ensure a high yield. This paper presents the system architecture of how to build a smart manufacturing system to analyze the big data of the manufacturing plant, and the equipment factor analysis methodology to increase the yield of products in the smart manufacturing system. In order to improve the yield of the product, it is necessary to analyze the defect factor that causes the low yield among the numerous factors of the equipment, and find and manage the equipment factor that affects the defect factor. This study analyzed the key factors of abnormal equipment that affect the yield of products in the manufacturing process using the data mining technique. Eventually, a methodology for finding key factors of abnormal equipment that directly affect the yield of products in smart manufacturing systems is presented. The methodology presented in this study was applied to the actual manufacturing plant to confirm the effect of key factors of important facilities on yield.

반도체 공정 교육을 위한 교육용 컴퓨터 모델 설계 및 구현 (The Design and Implementation of an Educational Computer Model for Semiconductor Manufacturing Courses)

  • 한영신;전동훈
    • 한국시뮬레이션학회논문지
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    • 제18권4호
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    • pp.219-225
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    • 2009
  • 본 연구는 복잡하고 다양한 반도체 웨이퍼 가공(FAB) 공정의 전체적인 흐름을 컴퓨터 모델로 구축하고 이를 Device 단면도를 나타내는 프리젠테이션 툴과 연동시키는 교육 모델의 개발을 목적으로 하였다. 급변하는 세계 반도체 시장에서 국내 반도체 업체는 지속적인 기술 개발과 더불어 효율적인 생산관리에 대응할 수 있도록 하여 국제 경쟁력을 키워야 할 것이다. 따라서 본 연구에서 다루어진 공정의 흐름과 각 단위공정의 특성을 바탕으로 설립된 모델은 서울대학교 반도체 공동 연구소를 대상으로 구현되었으나 앞으로 생산 관리를 담당할 국내 반도체 업체들의 신입사원과 현장기술자의 질적 향상을 위한 시청각 교육용 자료로의 활용 시 상당한 효과를 거둘 것이라 예상된다. 이는 생산업체에 국한되어지는 것만은 아니며 반도체 공정에 관련된 대학 학과목에서도 활용되어지리라 생각된다. 또한 확장성과변화에 유연한 모델을 개발함으로써 반도체 생산 업체들은 구성된 표준 모델을 이용하여 각 회사의 실정에 맞추어 자사에 대한 시뮬레이션을 손쉽게 수행함으로써 많은 교육 효과와 이에 따른 원가 절감의 효과까지 거둘 수 있을 것이다.

반도체 FAB공정의 사이클타임 단축을 위한 병목일정계획 (Bottleneck Scheduling for Cycletime Reduction in Semiconductor Fabrication Line)

  • 이영훈;김태헌
    • 한국경영과학회:학술대회논문집
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    • 한국경영과학회 2001년도 추계학술대회 논문집
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    • pp.298-301
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    • 2001
  • In semiconductor manufacturing, wafer fabrication is the most complicated and important process, which is composed of several hundreds of process steps and several hundreds of machines involved. The productivity of the manufacturing mainly depends on how well they control balance of WIP flow to achieve maximal throughput under short manufacturing cycle time. In this paper mathematical formulation is suggested for the stepper scheduling, in which cycle time reduction and maximal production is achieved.

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Applying a Life-Cycle Assessment to the Ultra Pure Water Process of Semiconductor Manufacturing

  • Tien, Shiaw-Wen;Chung, Yi-Chan;Tsai, Chih-Hung;Yang, Yung-Kuang;Wu, Min-Chi
    • International Journal of Quality Innovation
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    • 제6권3호
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    • pp.173-189
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    • 2005
  • A life-cycle assessment (LCA) is based on the attention given to the environmental protection and concerning the possible impact while producing, making, and consuming products. It includes all environmental concerns and the potential impact of a product's life cycle from raw material procurement, manufacturing, usage, and disposal (that is, from cradle to grave). This study assesses the environmental impact of the ultra pure water process of semiconductor manufacturing by a life-cycle assessment in order to point out the heavy environmental impact process for industry when attempting a balanced point between production and environmental protection. The main purpose of this research is studying the development and application of this technology by setting the ultra pure water of semiconductor manufacturing as a target. We evaluate the environmental impact of the Precoat filter process and the Cation/Anion (C/A) filter process of an ultra pure water manufacturing process. The difference is filter material used produces different water quality and waste material, and has a significant, different environmental influence. Finally, we calculate the cost by engineering economics so as to analyze deeply the minimized environmental impact and suitable process that can be accepted by industry. The structure of this study is mainly combined with a life-cycle assessment by implementing analysis software, using SimaPro as a tool. We clearly understand the environmental impact of ultra pure water of semiconductor used and provide a promotion alternative to the heavy environmental impact items by calculating the environmental impact during a life cycle. At the same time, we specify the cost of reducing the environmental impact by a life-cycle cost analysis.

반도체 패키징용 기계식 프레스의 최적설계에 관한 연구 (A Study on the Optimal Design of Mechanical Molding Press for Semiconductor Packaging)

  • 김문기
    • 한국생산제조학회지
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    • 제22권3호
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    • pp.356-363
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    • 2013
  • Mechanical molding press which is used for transformation process during semiconductor manufacturing process has structural deformations by pressure. If these deformations have over limit range, life of the press itself can be reduced and it will be exerted on a bad effect for quality of the semiconductor. In this research, the main plates and links of a press are analyzed in relation to the structural deformations caused by pressure excluding thermal deformations. After modifying the modeling, the analysis is performed again to determine optimal design of the press, and this design is introduced to ensure that most of the stresses on the main plates are within safe allowable limits. As a result, an optimal design method for the structure is investigated to produce the desired pressure even when the size of the main structure is minimized.

반도체 공정의 공급 사슬망 관리 (Key Issues and Challenges of Semiconductor Supply Chain Management)

  • 류준형;이인범
    • Korean Chemical Engineering Research
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    • 제46권3호
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    • pp.571-580
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    • 2008
  • 반도체 제조 공정 중에 광범위하게 사용되고 있는 많은 프로세스 공정들이 있음에도 화학공학 측면에서 반도체 산업이 어떤 상황이며 실질적으로 어떤 문제들을 가지고 있는가에 대한 학문적 접근은 다루어지지 못했다. 본 연구에서는 반도체 산업 중 반도체의 공급 사슬망 관리(Supply Chain Management) 부분을 집중적으로 분석하여 공정 시스템공학이나 화학공학에서 어떻게 기여할 수 있을까에 대해 살펴보고자 한다. 반도체 관련 기업에서의 근무 경험과 연구결과를 바탕으로 관련 사례와 자료들을 통해 주요 개념들을 소개하고 향후 발전 방향을 제안하였다.

반도체 설비의 효율성 제고를 위한 설비 할당 스케줄링 규칙에 관한 연구 (A Study on Deterministic Utilization of Facilities for Allocation in the Semiconductor Manufacturing)

  • 김정우
    • 산업경영시스템학회지
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    • 제39권1호
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    • pp.153-161
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    • 2016
  • Semiconductor manufacturing has suffered from the complex process behavior of the technology oriented control in the production line. While the technological processes are in charge of the quality and the yield of the product, the operational management is also critical for the productivity of the manufacturing line. The fabrication line in the semiconductor manufacturing is considered as the most complex part because of various kinds of the equipment, re-entrant process routing and various product devices. The efficiency and the productivity of the fabrication line may give a significant impact on the subsequent processes such as the probe line, the assembly line and final test line. In the management of the re-entrant process such as semiconductor fabrication, it is important to keep balanced fabrication line. The Performance measures in the fabrication line are throughput, cycle time, inventory, shortage, etc. In the fabrication, throughput and cycle time are the conflicting performance measures. It is very difficult to achieve two conflicting goal simultaneously in the manufacturing line. The capacity of equipment is important factor in the production planning and scheduling. The production planning consideration of capacity can make the scheduling more realistic. In this paper, an input and scheduling rule are to achieve the balanced operation in semiconductor fabrication line through equipment capacity and workload are proposed and evaluated. New backward projection and scheduling rule consideration of facility capacity are suggested. Scheduling wafers on the appropriate facilities are controlled by available capacity, which are determined by the workload in terms of the meet the production target.

반도체 제조 공정에서 실리콘 표면에 유입된 Stress의 마이크로 Raman 분광분석 (Micro Raman Spectroscopic Analysis of Local Stress on Silicon Surface in Semiconductor Fabrication Process)

  • 손민영;정재경;박진성;강성철
    • 분석과학
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    • 제5권4호
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    • pp.359-366
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    • 1992
  • 본 논문은 마이크로 Raman 분광분석법을 이용하여 국부적 열산화 후 실리콘 표면에 유입되는 스트레스를 평가한 것이다. 국부적 열산화 후 실리콘 표면에 유입되는 스트레스는 실리콘 산화막과 active 영역의 경계 부분에서 최대치를 나타내었다. Active 영역의 크기가 작아질수록 스트레스량은 증가하며, 이는 스트레스가 active 영역의 크기에 의존함을 보여 주는 것이다. 또한, active 영역이 $0.45{\mu}m$인 세 가지 소자 분리 공정, A, B, moB를 평가한 결과 moB 공정의 스트레스 값이 가장 작았으며, 새부리 효과도 가장 작았다.

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반도체 식각공정을 위한 비가연성 혼합냉매 줄톰슨 냉동기 설계 (Design of Non-flammable Mixed Refrigerant Joule-Thomson Refrigerator for Semiconductor Etching Process)

  • 이천규;김진만;이정길
    • 반도체디스플레이기술학회지
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    • 제21권2호
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    • pp.144-149
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    • 2022
  • A cryogenic Mixed Refrigerant Joule-Thomson refrigeration cycle was designed to be applied to the semiconductor etching process with non-flammable constituents. 3-stage cascade refrigerator, single mixed refrigerant Joule-Thomson refrigerator, and 2-stage cascade type mixed refrigerant Joule-Thomson refrigerator are analyzed to figure out the coefficient of performance. Non-flammable mixture of argon(Ar), tetrafluoromethane(R14), trifluoromethane (R23) and octafluoropropane(R218) were utilized to analyze the refrigeration cycle efficiency. The designed refrigeration cycle was adapted to cool down the coolant of HFE7200(Ethoxy-nonafluorobutane, C4F9OC2H5) with certain constraints. Maximum coefficient of performance of the refrigeration system is obtained as 0.289 for the cooling temperature lower than -100℃. The detailed result of the coefficient of performance according to the mixture composition is discussed in this study.