• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.9
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• pp.4467-4471
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• 2013

In this research, developed full-scan photoresist coating system(FPCS) can improve the efficiency of the photoresist coating system essential for spinner equipment in nano semiconductor manufacturing process. The devices developed in this research, which can be swiftly replaced in case abnormal state element changes or wafer manufacturing defect occurs, are anticipated to improve module yield as well as real-time monitoring on the state element in order to prevent the complex process defect due to the photoresist miss coating.

• International Journal of Quality Innovation
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• v.7 no.2
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• pp.141-156
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• 2006

This study describes a novel algorithm for optimizing the quality yield of silicon wafer slicing. 12 inch wafer slicing is the most difficult in terms of semiconductor manufacturing yield. As silicon wafer slicing directly impacts production costs, semiconductor manufacturers are especially concerned with increasing and maintaining the yield, as well as identifying why yields decline. The criteria for establishing the proposed algorithm are derived from a literature review and interviews with a group of experts in semiconductor manufacturing. The modified Delphi method is then adopted to analyze those results. The proposed algorithm also incorporates the analytic hierarchy process (AHP) to determine the weights of evaluation. Additionally, the proposed algorithm can select the evaluation outcomes to identify the worst machine of precision. Finally, results of the exponential weighted moving average (EWMA) control chart demonstrate the feasibility of the proposed AHP-based algorithm in effectively selecting the evaluation outcomes and evaluating the precision of the worst performing machines. So, through collect data (the quality and quantity) to judge the result by AHP, it is the key to help the engineer can find out the manufacturing process yield quickly effectively.

• Journal of the Semiconductor & Display Technology
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• v.19 no.3
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• pp.12-18
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• 2020

In semiconductor manufacturing, defect detection is critical to maintain high yield. Currently, computer vision systems used in semiconductor photo lithography still have adopt to digital image processing algorithm, which often occur inspection faults due to sensitivity to external environment. Thus, we intend to handle this problem by means of using Mask R-CNN instead of digital image processing algorithm. Additionally, Mask R-CNN can be trained with image dataset pre-processed by means of the specific designed digital image filter to extract the enhanced feature map of Convolutional Neural Network (CNN). Our approach converged advantage of digital image processing and instance segmentation with deep learning yields more efficient semiconductor photo lithography inspection system than conventional system.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2013.05a
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• pp.643-644
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• 2013

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.431-432
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• 2012

In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.12 no.5
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• pp.163-169
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• 2013

The objective of this study is to replace labor intensive forging processes by an automated system. For achieving it, an exclusive mechanism that consists of a positioner, an arm, and a hanger is configured to handle hot forging objects. Also, a structural analysis is applied to the horizontal motion unit, which is the most highly loaded, in order to verify its validity. In addition, its possibility is also verified through identifying the performance of the proposed system before applying it to sites. As a result, the major characteristic items, such as positioning accuracy, material diameter, object traveling weight, product failure rate, and forging process rate, in this system are perfectly verified for applying it to manufacturing sites.

• Journal of the Semiconductor & Display Technology
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• v.10 no.2
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• pp.1-5
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• 2011

In recent years, worldwide production of solar wafers increased rapidly. Therefore, the solar wafer technology in the developed countries already has become an industry, and related industries such as solar wafer manufacturing equipment have developed rapidly. In this paper we propose the color classification method of the polycrystalline solar wafer that needed in manufacturing equipment. The solar wafer produced in the manufacturing process does not have a uniform color. Therefore, the solar wafer panels made with insensitive color uniformity will fall off the aesthetics. Gaussian mixture models (GMM) are among the most statistically mature methods for clustering and we use the Gaussian mixture models for the classification of the polycrystalline solar wafers. In addition, we compare the performance of the color feature vector from various color space for color classification. Experimental results show that the feature vector from YCbCr color space has the most efficient performance and the correct classification rate is 97.4%.

• Journal of Industrial Technology
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• v.43 no.1
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• pp.49-55
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• 2023

Cluster tools are extensively employed in various wafer fabrication processes within the semiconductor manufacturing industry, including photo lithography, etching, and chemical vapor deposition. Contemporary fabrication facilities encounter customer orders with technical specifications that are similar yet slightly varied. Consequently, modern fabrications concurrently manufacture two or three different wafer types using a cluster tool to maximize chamber utilization and streamline the flow of wafer lots between different process stages. In this review, we introduce two methods of concurrent processing of multiple wafer types: 1) concurrent processing of multiple wafer types with different job flows, 2) concurrent processing of multiple wafer types with identical job flows. We describe relevant research trends and achievements and discuss future research directions.

• Journal of the Semiconductor & Display Technology
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• v.1 no.1
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• pp.41-45
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• 2002

In modem manufacturing, new applations and technologies demand smaller, and functional devices to replace large systems. As miniaturization becomes a necessity, many companies are interested in small pumps for use in creating ultra-high vacuum, but past efforts to develop such systems have failed due to problems with vibration, stress, heat and power consumption. This paper shows analysis-based design techniques for high vacuum turbomolecular pump by finite element analysis.

• Journal of the Korean Society of Safety
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• v.25 no.1
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• pp.27-31
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• 2010

It is a well known fact that the LCD and Semiconductor Devices are a central part of IT industry which is important in the present and the future. But the biggest problem of Semiconductor and LCD manufacturing is maintaining a cleaning room environment. For this reason, the soft X-ray type Ionizer was used as the electrostatic reducer device, which protects damage of the product against electrostatic discharge in the manufacturing process. Therefore it is a essential important factor during Semiconductor and LCD production process. But the soft X-ray has a intrinsic problem with harmful to human being in case of soft X-ray exposure. That's reason we have the research to solve above problem and made an apparatus that it was covered with shielding structure to protect X-ray radiation to outside. And besides, it has a possibility to eliminate the charged electrostatic in the narrow space through the slot for Ion emissions with dual soft X-ray sources on the both side. It is also not make the particles from itself when it has been operated.