• Journal of IKEEE
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• v.18 no.3
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• pp.341-348
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• 2014

When several resuable semiconductor IPs are connected and implemented into an integrated chip, each semiconductor IP should provide code files for synthesis and interface modeling files for simulation and verification. However, description methods and levels of abstraction of interface modeling files are different because these semiconductor IPs are designed by different designers, which makes some problems in simulation and verification. This paper proposes a standardized modeling method of semiconductor IP interfaces. It restricts semiconductor IP interfaces to several predefined level of abstraction. The proposed method helps the chip integration designer to easily connect different semiconductor IPs and to simulate and verify them.

• Journal of IKEEE
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• v.18 no.3
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• pp.349-355
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• 2014

In semiconductor IP reuse, precise understanding of semiconductor IP interfaces is essential for integrated chip design. However, in general, these interfaces are described in the original designer's description style. Furthermore, their description method are not unified, so it is very difficult for the chip integration designer to understand them. This paper proposes a standardized description method of semiconductor IP interfaces. It consists of 9 items such as IP information, description level, model provision, data type, interface information, port information, signal information, protocol information, and source file. The proposed method helps the chip integration designer to understand semiconductor IP interfaces and to integrate them into a single chip.

• Journal of Korea Technology Innovation Society
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• v.15 no.3
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• pp.500-532
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• 2012

This study analyzed the technology innovation strategies of knowledge-based companies in the semiconductor IP industry. The theoretical approaches of this study are to i) the creation, protection and utilization of knowledge and innovation, ii) value creation from innovation, iii) modularity, timing of market entry, and the emergence and competition of standard (dominant design). Based on the theoretical analysis, I presented exploratory research hypotheses. Ultimately, this study examined the proposed hypotheses by conducting case studies on the technology innovation strategy of two leading knowledge-based companies in the semiconductor IP industry: ARM and INTEL. First, knowledge-based companies entering in the early stage of the technology cycle select the vertically-integrated technology strategy because of lower access to complementary knowledge assets, and maintain the vertically-integrated technology strategy despite the environmental change-driven differentiation of industry's value chain. Second, knowledge-based companies entering in the later stage of the technology cycle prefer the contract-based technology strategy because of its increased accessibility to complementary knowledge assets, and choose a different path of innovation strategies depending on whether their asset has the feature of discontinuity or not.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2007.05a
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• pp.152-156
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• 2007

We introduce the IP3102 which is developed by Interpion Semiconductor co. LTD. for the CFL ballaster. The IP3102 has thermal compensation function. In this paper, we present the temperature compensation design technique and its implementation in the IP3102. The experimental results is also presented in this paper.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2007.05a
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• pp.15-20
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• 2007

In this paper we introduce the IP3003 which provides excellent Power Factor and Total Harmonic Distortion to the power system. It is developed by Interpion Semiconductor co. LTD. However, the efficiency of power factor correction system is very difficult to analyze mathematically. In this paper, we use the numerical simulation methods for analyzing PFC systems.

• Electronics and Telecommunications Trends
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• v.16 no.2 s.68
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• pp.40-52
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• 2001

본 논문은 반도체 공정이나 설계환경에 무관하게 재사용이 가능하면서 라이센스에 의해 보호되는 전자회로 설계 모듈 IP에 관한 세계적인 표준안들에 대하여 살펴본다. 현재 선진 외국의 반도체, 통신 관련 기업들은 자신들의 기능 모듈을 IP화 하는 데 있어서 1996년에 설립된 IP의 국제 표준화 단체인 VSIA의 표준안에 부합하도록 노력하고 있다. 현재까지 VSIA는 약 1,000페이지에 달하는 13종의 사양서와 표준안 및 기술문서를 개발하였으며, 전세계 200여 개의 회원기관에 공개하고 있다. 이와 같은 표준안들은 모든 회원사들이 제안하는 시스템 통합, 테스트, 혼성신호, 온칩버스, 검증, 보안 등의 표준관련 제안들을 8개의 VSIA DWG에서 심의하여 확정하며 계속적인 보완과 수정 및 추가가 진행되고 있다. 본 고는 가장 최신 버전들을 중심으로 IP의 표준화 동향을 파악 분석하고, 표준안들의 본질을 정의하였으며, VSIA 표준안에 부합 시킬 수 있는 절차를 체계화 함으로 국내의 IP 개발에 일조를 하고자 하였다.

• Journal of the Semiconductor & Display Technology
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• v.14 no.3
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• pp.13-22
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• 2015

LED (Light Emitting Diode) lighting is gaining more and more market penetration as one of the global warming countermeasures. LED is the next generation of fusion source composed of epi/chip/packaging of semiconductor process technology and optical/information/communication technology. LED has been applied to the existing industry areas, for example, automobiles, TVs, smartphones, laptops, refrigerators and street lamps. Therefore, LED makers have been striving to achieve the leading position in the global competition through development of core source technologies even before the promotion and adoption of LED technology as the next generation growth engine with eco-friendly characteristics. However, there has been a point of view on the cost compared to conventional lighting as a large obstacle to market penetration of LED. Therefore, companies are developing a Chip-Scale Packaging (CSP) LED technology to improve performance and reduce manufacturing costs. In this study, we perform patent analysis associated with Flip-Chip CSP LED and flow chart for promising technology forecasting. Based on our analysis, we select key patents and key patent players to derive the business strategy for the business success of Flip-Chip CSP PKG LED products.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.924-927
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• 2009

IP reuse technology, for the sake of out-performance and the reduction of development period of IT-SoC is the most essential factor for the sound growth of SoC industry. As for this IP reuse technology, it is very important to decide the proper specification and the standardization of the requirement from the companies, as well as to develop our own domestic technological know-how which does not depend on import. In this study, we propose to analyze a security core IP with pure domestic technological know-how, mentioning an example from $CAST_{TM}$, which presently is an American company costing royalty.

• TTA Journal
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• s.178
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• pp.124-127
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• 2018

(주)칩스앤미디어는 2003년 반도체 설계 자산(Semiconductor IP)생산을 시작으로 현재는 표준 영상 압축 기술인 MPEG 표준을 비롯하여 UHD 표준 압축 기술인 HEVC 등을 시장에 공급하고 있으며, 이미지 신호 처리(ISP) 및 CV IP 등의 시장 출시를 준비 중이다. HEVC의 개발 이후 ISO/IEC에서는 차세대 영상 압축 기술에 대한 표준화를 논의하고 있다. (주)칩스앤미디어는 표준 규격이 완료되기를 기다려 이를 구현하기보다, 한 발 더 앞서 행동하는 것이 현명하리라 판단했다. 직접 국제 표준을 제안함으로써 원천 특허를 확보하고자 한 것이다. TTA 자문서비스의 도움으로 (주)칩스앤미디어는 차세대 영상 압축 기술 표준 관련 특허출원에 성공했다.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2006.10a
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• pp.77-81
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• 2006

본 논문은 반도체 장비 및 디스플레이 장비에서 적용되는 네트워크 통신 규약인 SECS 통신 프로토콜을 TCP/IP 소켓 프로그램을 이용하여 구현한다. 특히 호스트와 장비간의 통신에 문제가 발생하여 데이터 전송이 누락되었을 때 이를 장비에 보관한 후에 통신이 복구되었을 때 다시 호스트에게 전송할 수 있는 스풀링 기능을 구현하여 통신장애의 누락되는 데이터를 다시 전송할 수 있도록 한다. 그리고 윈도우 프로그램을 기반으로 하나의 드라이버 프로그램에서 호스트(액티브) 측과 장비(패시브) 측을 선택하여 사용 가능하게 구현한다.