• Transactions of the Korean Society of Mechanical Engineers A
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• v.32 no.10
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• pp.831-835
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• 2008

We present a continuous electrical cell lysis chip, using a DC bias voltage to generate the focused high electric field for cell lysis as well as the electroosmotic flow for cell transport. The previous cell lysis chips apply an AC voltage between micro-gap electrodes for cell lysis and use pumps or valves for cell transport. The present DC chip generates high electrical field by reducing the width of the channel between a DC electrode pair, while the previous AC chips reducing the gap between an AC electrode pair. The present chip performs continuous cell pumping without using additional flow source, while the previous chips need additional pumps or valves for the discontinuous cell loading and unloading in the lysis chambers. The experimental study features an orifice whose width and length is 20 times narrower and 175 times shorter than the width and length of a microchannel. With an operational voltage of 50 V, the present chip generates high electric field strength of 1.2 kV/cm at the orifice to disrupt cells with 100% lysis rate of Red Blood Cells and low electric field strength of 60 V/cm at the microchannel to generate an electroosmotic flow of $30{\mu}m/s{\pm}9{\mu}m/s$. In conclusion, the present chip is capable of continuous self-pumping cell lysis at a low voltage; thus, it is suitable for a sample pretreatment component of a micro total analysis system or lab-on-a-chip.

• Proceedings of the KIEE Conference
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• 1997.07d
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• pp.1364-1366
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• 1997

Planar type magnetized inductively coupled plasma etcher has been built. The density and temperature of Ar plasma are measured as a function of rf power, external magnetic field, and pressure. The oxide etch rate and selectivity to polysilicon are measured as the above mentioned conditions and self-bias voltage.

• Journal of the Korean institute of surface engineering
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• v.43 no.2
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• pp.80-85
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• 2010

The surfaces of WC-Co and SCM415 were etched to form a micro size protrusion for oil based ultra low friction applications using an ion bombardment process in a filtered vacuum arc plasma. WC-Co species showed that a self-patterned surface was available by the ion bombarding process due to the difference of sputtering yield of WC and Co. And the increasing rate of roughness was 0.6 nm/min at -600 V substrate bias voltage. The increasing rate of roughness of SCM415 species was 1.5 nm/min at -800 V, but the selfpatterning effect as shown in WC-Co was not appeared. When the SCM415 species pretreated by electrical discharge machining is etched, the increasing rate of roughness increased from 1.5 nm/min to 40 nm/min at -800 V substrate bias voltage and the uniform surface treatment was available.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1475-1476
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• 2011

플라즈마 중합 기법에 의해 제작된 고분자 (plasma polymerized polymer) 박막은 단량체(monomer)의 고유의 특성을 유지하며 고분자 박막이 형성됨을 확인하고, 기판 바이어스에 의해 시간에 따른 증착 두께는 선형적으로 증가함을 확인하였다. 자체 제작된 플라즈마 중합 시스템에서 self-bias voltage를 최소화하여 플라즈마 고분자의 증착효율 및 두께 조절이 가능함을 확인하였다. 플라즈마 합성을 이용해 고분자 박막을 제조하고, MIM 소자를 제작하여 통상적인 고분자 합성기법으로 제조된 고분자 대비 높은 유전상수 값이 확인되었다. 결과적으로 유기박막 트랜지스터 및 유기 메모리 등 플렉서블 유기전자소자용 절연/유전체 박막으로의 응용이 기대된다.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.5
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• pp.1-10
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• 1998

A GaAs MMIC composed of VCO (voltage controlled oscillator) and mixer for PCS receiver has been developed using 1.mu.m ion implanted GaAs MESFET process. The VCO consists of a colpitts-type oscillator with a dielectric resonator and the circuit configuration of the mixer is a dual-gate type with an asymmetric combination of LO and RF FETs for the improvement of intermodulation characteristics. The common-source self-biasing is used in all circuits including a buffer amplifier and mixer, achieving a single power supply (3V) operation. The total power dissipation is 78mW. The VCO chip shows a phase noise of-99 dBc/Hz at 100KHz offset. The combined VCO/mixer chip shows a flat conversion gain of 2dB, the frequency-tuning factor of 80MHz/volts in the varacter bias ranging from 0.5V to 0.5V , and output IP3 of dBm at varactor bias of 0V. The fabricated chip size is 2.5mm X 1.4mm.

• Journal of Magnetics
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• v.8 no.4
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• pp.160-163
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• 2003

In magnetic flux measurement, output voltage drift of electronic integrator is an essential problem. In this work, we have developed a new kind of Miller type integrator using a sample and hold amplifier. Input bias current was measured and this value was hold in the sample and hold amplifier, after that input bias current of Miller integrator was compensated automatically using the value which holds in the sample and hold amplifier. Developed flux-meter shows the drift of flux-meter are smaller than 10$^{-5}$ Wb/min in full scale of 10$^{-2}$, and we could also measure multi-channel magnetic flux simultaneously.

• Journal of the Korean Magnetics Society
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• v.5 no.4
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• pp.299-303
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• 1995

In order to improve the read-out signal waveform, a shielded magnetoresistive (SMR) head has been designed and studied by applying the transmission-line model. The bias and signal field distribution, the voltage output, the harmonic output signal and resistance value of MR element are simulated as functions of bias current and recording displacement. The results show that the SMR head has good linear character with respect to the medium recording signal in high recording frequency of about 2.5 MHz. The amplitude and waveform of reroduction signal have been obviously improved. The saturation effect on the symmetry and amplitude of reproducing output have also been analyzed.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.1
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• pp.166-172
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• 2001

A RF wideband receiver for INMARSAT-B satellite communications system was composed of low noise amplifier and high gain amplifier, The low noise amplifier used to the resistive decoupling circuit for input impedance matching and self-bias circuits for low noise. The high gain amplifier consists of matched amplifier type to improve receiver gain. The active bias circuit can be used to provide temperature stability without requiring the large voltage drop or relatively high-dissipated power needed with a bias stabilization resistor. The bandpass filter was used to reduce a spurious level. As a result, the characteristics of the receiver implemented here show more than 60 dB in gain and less than 1.8:1 in input and output voltage standing wave ratio(VSWR), especially the carrier to noise ratio which is input signal level -126.7 dB m at 1537.5 MHz is a 45.23 dB /Hz at a 1.02 kHz.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.8
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• pp.622-628
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• 2001

We developed 1- and 2-dimensional fluid model for the analysis of a capacitively coupled Ar RF(Radio Frequency) glow discharge. This discharge is in pure Ar gas at the pressure 100[mTorr], frequency 13.56[MHz] and voltage amplitude 120[V}. This model is based on the equations of continuity and electron energy conservation coupled with Poison equation. 2-dimensional model is simulated on the condition of GEC(Gaseous Electronic Conference cell). The geometry of the discharge chamber and the electrodes used in the model is cylindrically simmetric; tow cylinders for the electrodes are surrounded by the grounded chamber. It is shown that 1-dimensional model is very useful on the understanding of RF glow discharge property and of the movement of charged particles. 2-dimensional model predicts off-axis maximum structure as in the experiments and has the results in qualitatively and quantitatively good agreement with the experiments. Effects of dc self-bias voltage, guard ring and reactor geometry is discussed.

• Bulletin of the Korean Chemical Society
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• v.33 no.12
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• pp.4155-4160
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• 2012

We characterized the physisorption of p-iodo-phenyl octadecyl ether molecules (I-POE) onto superlattice regions of graphite surfaces using scanning tunneling microscopy (STM). The formation of self-organized I-POE monolayers does not affect the overall structures of moir$\acute{e}$ patterns and their modulation periods. However, the packing density of the I-POE monolayer and the orientations of lamella structures were sensitive to the underlying superlattice structure. Depending on the bias voltage, the STM images selectively showed moir$\acute{e}$ pattern, I-POE layer, or both. Reflecting the local density of states at a certain energy level, the STM images thereby revealed the relative energy level scale of the superlattice with respect to the molecular orbitals of I-POE.