• 제목/요약/키워드: selective wet-etching

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환원 석출법을 이용한 모양과 크기가 제어된 금 입자의 제조 (Fabrication of Size- and Shape- Controlled Gold Particles using Wet Chemical Process)

  • 홍소야;이창환;김주용
    • 한국염색가공학회지
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    • 제22권2호
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    • pp.123-131
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    • 2010
  • Shape and size controlled synthesis of gold particles has been studied by using wet-chemical method. When ${AuCl_4}^-$ in aqueous $HAuCl_4$ precursor was reduced using $Na_2SO_3$ as a reducing agent, mixtures of spherical, triangular and hexagonal particles were prepared in a few minutes. It was found that the shape selective oxidative etching by ${AuCl_4}^-\;+\;Cl^-$ anions and crystal growth took place simultaneously. As the ${AuCl_4}^-$ and $Cl^-$ concentration increased, yields of large triangular and hexagonal plate type particles increased, while the spherical particles decreased in most cases. Possible etching and growth mechanisms are discussed.

ECR 플라즈마와 습식 식각으로 게이트 리세스한 AlGaAs/InGaAs/GaAs PHEMT 소자의 전기적 특성연구 (A Study of Electrical Properties for AlGaAs/InGaAs/GaAs PHEMT s Recessed by ECR Plasma and Wet Etching)

  • 이철욱;배인호;최현태;이진희;윤형섭;박병선;박철순
    • 한국전기전자재료학회논문지
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    • 제11권5호
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    • pp.365-370
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    • 1998
  • We studied a electrical properties in GaAs/AlGaAs/InGaAs pseudomorphic high electron mobility transistors(PHEMT s) recessed by electron cyclotron resonance(ECR) plasma and wet etching. Using the $NH_4OH$ solution, a nonvolatile AlF$_3$layer formed on AlGaAs surface after selective gate recess is effectively eliminated. Also, we controlled threshold voltage($V_th$) using $H_3PO_4$ etchant. We have fabricated a device with 540 mS/mm maximum transconductance and -0.2 V threshold voltage by using $NH_4OH$ and $H_3PO_4$dip after ECR gate recessing. In a 2-finger GaAs PHEMT with a gate length of 0.2$\mu m$ and width of 100 $\mu m$, a current gain of 15 dB at 10 GHz and a maximum cutoff frequency of 58.9 GHz have been obtained from the measurement of current gain as a function of frequency at 12mA $I_{dss}$ and 2 V souce-drain voltage.

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Fabrication of Large Area Transmission Electro-Absorption Modulator with High Uniformity Backside Etching

  • Lee, Soo Kyung;Na, Byung Hoon;Choi, Hee Ju;Ju, Gun Wu;Jeon, Jin Myeong;Cho, Yong Chul;Park, Yong Hwa;Park, Chang Young;Lee, Yong Tak
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.220-220
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    • 2013
  • Surface-normal transmission electro-absorption modulator (EAM) are attractive for high-definition (HD) three-dimensional (3D) imaging application due to its features such as small system volume and simple epitaxial structure [1,2]. However, EAM in order to be used for HD 3D imaging system requires uniform modulation performance over large area. To achieve highly uniform modulation performance of EAM at the operating wavelength of 850 nm, it is extremely important to remove the GaAs substrate over large area since GaAs material has high absorption coefficient below 870 nm which corresponds to band-edge energy of GaAs (1.424 eV). In this study, we propose and experimentally demonstrate a transmission EAM in which highly selective backside etching methods which include lapping, dry etching and wet etching is carried out to remove the GaAs substrate for achieving highly uniform modulation performance. First, lapping process on GaAs substrate was carried out for different lapping speeds (5 rpm, 7 rpm, 10 rpm) and the thickness was measured over different areas of surface. For a lapping speed of 5 rpm, a highly uniform surface over a large area ($2{\times}1\;mm^2$) was obtained. Second, optimization of inductive coupled plasma-reactive ion etching (ICP-RIE) was carried out to achieve anisotropy and high etch rate. The dry etching carried out using a gas mixture of SiCl4 and Ar, each having a flow rate of 10 sccm and 40 sccm, respectively with an RF power of 50 W, ICP power of 400 W and chamber pressure of 2 mTorr was the optimum etching condition. Last, the rest of GaAs substrate was successfully removed by highly selective backside wet etching with pH adjusted solution of citric acid and hydrogen peroxide. Citric acid/hydrogen peroxide etching solution having a volume ratio of 5:1 was the best etching condition which provides not only high selectivity of 235:1 between GaAs and AlAs but also good etching profile [3]. The fabricated transmission EAM array have an amplitude modulation of more than 50% at the bias voltage of -9 V and maintains high uniformity of >90% over large area ($2{\times}1\;mm^2$). These results show that the fabricated transmission EAM with substrate removed is an excellent candidate to be used as an optical shutter for HD 3D imaging application.

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Pseudo MOSFET을 이용한 Nano SOI 웨이퍼의 전기적 특성분석 (Electrical Characterization of Nano SOI Wafer by Pseudo MOSFET)

  • 배영호;김병길;권경욱
    • 한국전기전자재료학회논문지
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    • 제18권12호
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    • pp.1075-1079
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    • 2005
  • The Pseudo MOSFET measurements technique has been used for the electrical characterization of the nano SOI wafer. Silicon islands for the Pseudo MOSFET measurements were fabricated by selective etching of surface silicon film with dry or wet etching to examine the effects of the etching process on the device properties. The characteristics of the Pseudo MOSFET were not changed greatly in the case of thick SOI film which was 205 nm. However the characteristics of the device were dependent on etching process in the case of less than 100 nm thick SOI film. The sub 100 nm SOI was obtained by thinning the silicon film of standard thick SOI wafer. The thickness of SOI film was varied from 88 nm to 44 nm by chemical etching. The etching process effects on the properties of pseudo MOSFET characteristics, such as mobility, turn-on voltage, and drain current transient. The etching Process dependency is greater in the thinner SOI wafer.

Pseudo-MOSFET을 이용한 nano SOI 웨이퍼의 전기적 특성분석 (Electrical Characterization of nano SOl wafer by Pseudo MOSFET)

  • 배영호;김병길;권경욱
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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    • pp.3-4
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    • 2005
  • The Pseudo-MOSFET measurements technique has been used for the electrical characterization of the nano SOL Silicon islands for the Pseudo-MOS measurements were fabricated by selective etching of surface silicon film with dry or wet etching to examine the effects of the etching process on the device properties. The characteristics of the Pseudo-MOS was not changed greatly in the case of thick SOI film which was 205 nm. However the characteristics of the device was dependent on etching process in the case of less than 100 nm thick SOI film. The sub 100nm SOI was obtained by thinning the silicon film of standard thick SOI. The thickness of SOI film was varied from 88 nm to 44 nm by chemical etching. The etching process effects on the properties of pseudo-MOSFET characteristics, such as mobility, turn-on voltage, and drain current transient. The etching process dependency is greater in the thinner SOI and related to original SOI wafer quality.

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Pore Distribution of Porous Silicon layer by Anodization Process

  • Lee, Ki-Yong;Chung, Won-Yong;Kim, Do-Hyun
    • 한국결정성장학회:학술대회논문집
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    • 한국결정성장학회 1996년도 The 9th KACG Technical Annual Meeting and the 3rd Korea-Japan EMGS (Electronic Materials Growth Symposium)
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    • pp.494-496
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    • 1996
  • The purpose of this study is to investigate the effect of process conditions on pore distribution in porous silicon layer prepared by electrochemical reaction. Porous silicon layers formed on p-type silicon wafer show the network structure of fine porse whose diameters are less than 100${\AA}$. In n-type porous silicon, selective growth was found on the pore surface by wet etching process after PR patterning. And numerical method showed high current density on the pore tip. With this result we confirmed that pore formation has two steps. First step is the initial attack on the surface and second step is the directional growth on the pore tip.

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HEMT 소자 제작을 위한 GaAs/AlGaAs층의 선택적 건식식각 (Selective Dry Etching of GaAs/AlGaAs Layer for HEMT Device Fabrication)

  • 김흥락;서영석;양성주;박성호;김범만;강봉구;우종천
    • 전자공학회논문지A
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    • 제28A권11호
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    • pp.902-909
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    • 1991
  • A reproducible selective dry etch process of GaAs/AlGaAs Heterostructures for High Electron Mobility Transistor(HEMT) Device fabrication is developed. Using RIE mode with $CCl_{2}F_{2}$ as the basic process gas, the observed etch selectivity of GaAs layer with respect to GaAs/$Al_{0.3}Ga_{0.7}$As is about 610:1. Severe polymer deposition problem, parialy generated from the use of $CCl_{2}F_{2}$ gas only, has been significantly reduced by adding a small amount of He gas or by $O_{2}$ plasma ashing after etch process. In order to obtain an optimized etch process for HEMT device fabrication, we com pared the properties of the wet etched Schottky contact with those of the dry etched one, and set dry etch condition to approach the characteristics of Schottky diode on wet etched surface. By applying the optimized etch process, the fabricated HEMT devices have the maximum transconductance $g_{mext}$ of 224 mS/mm, and have relatively uniform distribution across the 2inch wafer in the value of 200$\pm$20mS/mm.

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대기압 플라즈마를 이용한 결정질 태양전지 표면 식각 공정 (Dry Etching Using Atmospheric Plasma for Crystalline Silicon Solar Cells)

  • 황상혁;권희태;김우재;최진우;신기원;양창실;권기청
    • 한국재료학회지
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    • 제27권4호
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    • pp.211-215
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    • 2017
  • Reactive Ion Etching (RIE) and wet etching are employed in existing texturing processes to fabricate solar cells. Laser etching is used for particular purposes such as selective etching for grooves. However, such processes require a higher level of cost and longer processing time and those factors affect the unit cost of each process of fabricating solar cells. As a way to reduce the unit cost of this process of making solar cells, an atmospheric plasma source will be employed in this study for the texturing of crystalline silicon wafers. In this study, we produced the atmospheric plasma source and examined its basic properties. Then, using the prepared atmospheric plasma source, we performed the texturing process of crystalline silicon wafers. The results obtained from texturing processes employing the atmospheric plasma source and employing RIE were examined and compared with each other. The average reflectance of the specimens obtained from the atmospheric plasma texturing process was 7.88 %, while that of specimens obtained from the texturing process employing RIE was 8.04 %. Surface morphologies of textured wafers were examined and measured through Scanning Electron Microscopy (SEM) and similar shapes of reactive ion etched wafers were found. The Power Conversion Efficiencies (PCE) of the solar cells manufactured through each process were 16.97 % (atmospheric plasma texturing) and 16.29 % (RIE texturing).

N-polar면의 선택적 에칭 방법을 통한 Free-standing GaN 기판의 Bowing 제어 (Control of Bowing in Free-standing GaN Substrate by Using Selective Etching of N-polar Face)

  • 김진원;손호기;임태영;이미재;김진호;이영진;전대우;황종희;이혜용;윤대호
    • 한국전기전자재료학회논문지
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    • 제29권1호
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    • pp.30-34
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    • 2016
  • In this paper, we report that selective etching on N-polar face by EC (electro-chemical)-etching effect on the reduction of bowing and strain of FS (free-standing)-GaN substrates. We applied the EC-etching to concave and convex type of FS-GaN substrates. After the EC-etching for FS-GaN, nano porous structure was formed on N-polar face of concave and convex type of FS-GaN. Consequently, the bowing in the convex type of FS-GaN substrate was decreased but the bowing in the concave type of FS-GaN substrate was increased. Furthermore, the FWHM (full width at half maximum) of (1 0 2) reflection for the convex type of FS-GaN was significantly decreased from 601 to 259 arcsec. In the case, we confirmed that the EC-etching method was very effective to reduce the bowing in the convex type of FS-GaN and the compressive stress in N-polar face of convex type of FS-GaN was fully released by Raman measurement.