• Journal of Power Electronics
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• v.19 no.4
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• pp.907-921
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• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

• Journal of Electrical Engineering and Technology
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• v.9 no.6
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• pp.1988-1994
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• 2014

In a single-phase grid-connected power system consisting of a DC/DC converter and a DC/AC converter, the current drawn from renewable energy sources has a tendency to be pulsated and contains second-order frequency ripple components, which results in several drawback such as a power harvesting loss and a shortening of the energy source's life. This paper presents a new second-order harmonic current reduction scheme with a fast dc-link voltage loop for two-stage dc-dc-ac grid connected systems. In the frequency domain, an adequate control design is performed based on the small signal transfer function of a two-stage dc-dc-ac converter. To verify the effectiveness of proposed control algorithm, a 1 kW hardware prototype has been built and experimental results are presented.

• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.2
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• pp.73-78
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• 2020

In this study, a novel reactive power control scheme is proposed to supply stable reactive power to the distribution line by compensating a ripple voltage of DC link. In a single-phase system, a magnitude of second harmonic is inevitably generated in the DC link voltage, and this phenomenon is further increased when the capacity of DC link capacitor decreases. Reactive power control was performed by controlling the d-axis current in the virtual synchronous reference frame, and the voltage control for maintaining the DC link voltage was implemented through the q-axis current control. The proposed method for compensating the ripple voltage was classified into three parts, which consist of the extraction unit of DC link voltage, high pass filter (HPF), and time delay unit. HPF removes an offset component of DC link voltage extracted from integral, and a time delay unit compensates the phase leading effect due to the HPF. The compensated DC voltage is used as feedback component of voltage control loop to supply stable reactive power. The performance of the proposed algorithm was verified through simulation and experiments. At DC link capacitance of 375 uF, the magnitude of ripple voltage decreased to 8 Vpp from 74 Vpp in the voltage control loop, and the total harmonic distortion of the current was improved.

• Journal of Power Electronics
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• v.19 no.4
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• pp.881-893
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• 2019

This paper proposes a practical sliding-mode controller design for shaping the impedances of cascaded boost-converter power decoupling circuits for reducing the second order harmonic ripple in photovoltaic (PV) current. The cascaded double-boost converter, when used as power decoupling circuit, has some advantages in terms of a high step-up voltage-ratio, a small number of switches and a better efficiency when compared to conventional topologies. From these features, it can be seen that this topology is suitable for residential (PV) rooftop systems. However, a robust controller design capable of rejecting double frequency inverter ripple from passing to the (PV) source is a challenge. The design constraints are related to the principle of the impedance-shaping technique to maximize the output impedance of the input-side boost converter, to block the double frequency PV current ripple component, and to prevent it from passing to the source without degrading the system dynamic responses. The design has a small recovery time in the presence of transients with a low overshoot or undershoot. Moreover, the proposed controller ensures that the ripple component swings freely within a voltage-gap between the (PV) and the DC-link voltages by the small capacitance of the auxiliary DC-link for electrolytic-capacitor elimination. The second boost controls the main DC-link voltage tightly within a satisfactory ripple range. The inverter controller performs maximum power point tracking (MPPT) for the input voltage source using ripple correlation control (RCC). The robustness of the proposed control was verified by varying system parameters under different load conditions. Finally, the proposed controller was verified by simulation and experimental results.

• Journal of Power Electronics
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• v.12 no.3
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• pp.377-386
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• 2012

An interleaved bridgeless buck-boost AC/DC converter is presented in this paper to achieve the characteristics of low conduction loss, a high power factor and low harmonic and ripple currents. There are only two power semiconductors in the line current path instead of the three power semiconductors in a conventional boost AC/DC converter. A buck-boost converter operated in the boundary conduction mode (BCM) is adopted to control the active switches to achieve the following characteristics: no diode reverse recovery problem, zero current switching (ZCS) turn-off of the rectifier diodes, ZCS turn-on of the power switches, and a low DC bus voltage to reduce the voltage stress of the MOSFETs in the second DC/DC converter. Interleaved pulse-width modulation (PWM) is used to control the switches such that the input and output ripple currents are reduced such that the output capacitance can be reduced. The voltage doubler topology is adopted to double the output voltage in order to extend the useable energy of the capacitor when the line voltage is off. The circuit configuration, principle operation, system analysis, and a design example are discussed and presented in detail. Finally, experiments on a 500W prototype are provided to demonstrate the performance of the proposed converter.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.1
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• pp.84-90
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• 2013

This paper explains control methods of single-phase grid connected battery charger. Charging mode is control by Constant Current - Constant Voltage method and discharging mode is controlled by active-reactive power control method. Current control method is based on the synchronous reference frame(SRF) PI controller, and the second harmonic of battery current is compensated by an added L-C resonant circuit. Feasibility of the proposed control methods is verified through experiment with a prototype of 5kW single-phase grid connected battery charger.

• Journal of international Conference on Electrical Machines and Systems
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• v.2 no.3
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• pp.330-335
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• 2013

This paper performs two kinds of Field-Oriented Control (FOC) for dual three phase permanent magnet synchronous motor (DTP-PMSM).The first is based on vector space decomposition to study the effect of current harmonics on electromechanical energy conversion. And the second presents the coupling relations between two sets of windings using two d-q transformation. And then this paper has deeply studied the differences between these two strategies, the different effect on the control of harmonic current and the reason for these differences. MATLAB-based Simulation studies of a 3KW DTP-PMSM are carried out to verify the analysis of differences between the two FOC strategies.

• Journal of IKEEE
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• v.26 no.1
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• pp.95-103
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• 2022

In this paper, the efficiency of a sensorless method with square-wave injection for a low-cost inverter, so called B4 inverter is presented. This inverter comprises only 4 switches to reduce system cost. It is distinguished from the conventional B6 inverter that has 6 of switching elements. The B4 inverter, injected a 1 kHz of harmonic wave, has been modelled using the functions and library in Matlab/Simulink. This paper described each component of sensorless algorithm. Among them, the Notch Filter is used to extract the harmonic component of the phase current and a second-order low-pass filter was used to reduce the ripple of the estimated speed. It is shown through simulation that the rotor angle of a permanent magnet synchronous motor is detected by multiplying the current waveform extracted using the notch filter by the harmonic voltage. The feasibility of the proposed method is shown through Simulink simulation.

• Proceedings of the KIPE Conference
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• 2011.11a
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• pp.67-68
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• 2011

본 논문에서는 Modular Multi-Level Converter(MMLC)의 셀(Cell) 캐패시터(Capacitor) 전압 밸런싱에서 전압맥동 최소화 방법을 제안한다. 암(Arm) 평균 전류를 직류성분으로만 제어 할 경우 기본파 주파수와 2 고조파로 흔들리는 순시전력 항이 셀 캐패시터 전압 맥동을 만든다. 이를 억제 하기위해 암 평균 전류에 2 고조파 교류 성분을 직류성분과 함께 제어하는 방법을 제안한다. 이 방법을 통하여 전압맥동을 줄일 수 있음을 밝히고, 주입되는 2 고조파 전류의 크기와 위상각 계산 방법을 제시한다. 모의실험 결과를 통해 제안된 방법의 유효성을 검증하였다.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.11
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• pp.68-76
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• 2014

This paper presents an offset error compensation algorithm for the accurate phase angle of the grid voltage in single-phase grid-connected inverters. The offset error generated from the grid voltage measurement process cause the fundamental harmonic component with grid frequency in the synchronous reference frame phase lock loop (PLL). As a result, the grid angle is distorted and the power quality in power systems is degraded. In addition, the dq-axis currents in the synchronous reference frame and phase current have the dc component, first and second order ripples compared with the grid frequency under the distorted grid angle. In this paper, the effects of the offset and scaling errors are analyzed based on the synchronous reference frame PLL. Particularly, the offset error can be estimated from the integrator output of the synchronous reference frame PLL and compensated by using proportional-integral controller. Moreover, the RMS (Root Mean Square) function is proposed to detect the offset error component. The effectiveness of the proposed algorithm is verified through simulation and experiment results.