• Journal of the Korean Society for Nondestructive Testing
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• v.14 no.2
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• pp.112-121
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• 1994

This paper discusses the feasibility of ultrasonic C-scan technique for nondestructive evaluation of spot weld quality. Ultrasonic evaluation for spot weld quality was performed by immersion method with the mechanical and the electronic scanning of point-focussed ultrasonic beam(25 MHz). For the sake of the approach to the quantitative measurement of nugget diameter and the discrimination of the corona bond from nugget, preliminary infinitesimal gap experiment by newton ring is tried in order to set up the optimum ultrasonic test condition. Ultrasonic image data obtained were confirmed and compared by optical microscope and SAM(Scanning Acoustic Microscope) observation of the spot-weld cross section. The results show that the nugget diameter can be measured with the accuracy of 1.0mm, and voids included in nugget can be detected to $10{\mu}m$ extent with simplicity and accuracy. Finally, it was found that it is necessary to make a profound study of definite discrimination of corona bond from nugget and the approach of quantitative evaluation of nugget diameter by utilizing the various image processing techniques.

• Journal of Korean Neurosurgical Society
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• v.29 no.12
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• pp.1570-1576
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• 2000

Objective : To evaluate objectively the sites of injury in patients with posttraumatic olfactory deficits and to suggest the diagnostic procedure for evaluation of posttraumatic anosmia. Methods : Ten patients with posttraumatic olfactory dysfunction were examined by means of olfactory testing, sinoscopy, contrast filled paranasal sinus computed tomography(contrast filled PNS CT) and magnetic resonance imaging(MRI). Five normal persons without olfactory dysfunction were also evauluated. The aerodynamic patency of olfactory cleft was examined by contrast filled PNS CT. The olfactory system(oflactory bulbs, olfactory tracts, inferior frontal region, hippocampi, or temporal lobes) was investigated in detail with MRI. The difference in the size of the olfactory bulb between normal volunteers and anosmic patients was evaluated by Student's t test. Results : Contrast filled dynamic CT scan was useful method for the evaluation of dynamic patency of the olfactory cleft. Paranasal CT scan of the all anosmic patients showed dynamic reflux of contrast media in olfactory cleft on valsalva maneuver. For the largest cross-sectional area and great height, the difference in olfactory bulb size between normal volunteers and patients was statistically significant(p<0.001) in MRI study. Conclusion : Posttraumatic anosmia was completely evaluated by olfactory testing, sinoscopy, and contrast filled CT scan for differentiation between conductive type and neurogenic type. Neurogenic anosmia was confirmed by perfect localization with MRI study.

• Transactions of the Korean Society of Automotive Engineers
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• v.17 no.1
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• pp.96-104
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• 2009

An anatomically detailed elderly human body model is under development. Using the anthropometric database of domestic nation-wide size survey, SizeKorea, a standard size and shape of 50th %tile elderly was constructed. Through the local recruitment process, a male volunteer with 71 years of age, 163cm of height and 63kg of weight has been selected. The exterior (skin) and interior (skeleton and organ) geometries were acquired from whole body 3D laser scan and various medical images such as CT, X-ray, and Ultrasonic of the volunteer. A particular attention has been paid into the combining process of exterior and interior geometries especially for joint articulation positions since they were measured at different postures (sitting vs. supine). A whole ribcage of PMHS which possessed similar anthropometry and age of standard 50th %tile elderly was prepared and dissected for the precise gauge of cortical rib bone thickness distributions. After completing the morphological construction of elderly human body, the finite element modeling will be processed by meshing elements and assigning mechanical properties to various biological tissues which reflect the aging effect.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.8
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• pp.9-16
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• 2004

For a System-on-a-Chip(SoC) comprised of multiple IP cores, test control techniques have been developed to perform the internal and external test efficiently relying on the various design for testability techniques such as scan and BIST(Built-In Self-Test). However the test area overhead is too expensive to guarantee diverse test link configurations. In this paper, at first we introduce a new flag based Wrapped Core Linking Module(WCLM) that enables systematic integration of IEEE 1149.1 TAP'd cores and P1500 wrapped cores. Then a simple test control technique, which can interconnect internal scan chains of different cores, is described with requiring least amount of area overhead compared with other state-of-art techniques. The design preserves compatibility with standards and scalability for hierarchical access.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.49 no.12
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• pp.675-682
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• 2000

When a system is composed of multi-boards, an efficient bus arbitration method for the data transfer bus must be provided for guaranteeing proper operations. In this paper, a new test methodology is developed which is used for testing on-line bus arbitration. In the new test methodology, events that are occurred during bus arbitration are defined, and expected signals during fault-free bus arbitration are compared with the signals captured during on-line bus arbitration using boundary-scan cells. For this, a new test architecture is proposed which is efficient for the maintenance and the repair of multi-board systems. In addition, the new methodology can be used with off-line interconnect test using boundary-scan.

• Journal of the Korean Society for Precision Engineering
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• v.16 no.7
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• pp.32-39
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• 1999

Digital signal processor (DSP) is used to obtain the peak value and the time difference of ultrasonic signals, to make digital filter, and to derive mathematical transformation from analog circuit. In this study, C-scan system and control program have been developed to high speed data acquisition. This system consists of signal processing parts (DSP, oscilloscope, pulser/receiver, digitizer), scanner, and control program. The developed system has been applied to a practical ultrasonic testing in overlay weld, and demonstrated high speed with precision

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.582-594
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• 2016

Various test data compression techniques have been developed to reduce the test costs of system-on-a-chips. In this paper, a scan chain reordering algorithm for code-based test data compression techniques is proposed. Scan cells within an acceptable relocation distance are ranked to reduce the number of conflicts in all test patterns and rearranged by a positioning algorithm to minimize the routing overhead. The proposed method is demonstrated on ISCAS '89 benchmark circuits with their physical layout by using a 180 nm CMOS process library. Significant improvements are observed in compression ratio and test power consumption with minor routing overhead.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.125-128
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• 2001

In this paper, we propose a low power Scan-based Built-ln Self Test based on circuit partitioning and pattern suppression using modified test control unit. To partition a CUT(Circuit Under Testing), the MHPA(Multilevel Hypergraph Partition Algorithm) is used. As a result of circuit partition, we can reduce the total length of test pattern, so that power consumptions are decreased in test mode. Also, proposed Scan-based BIST architecture suppresses a redundant test pattern by inserting an additional decoder in BIST control unit. A decoder detects test pattern with high fault coverage, and applies it to partitioned circuits. Experimental result on the ISCAS benchmark circuits shows the efficiency of proposed low power BIST architecture.

• Proceedings of the KAIS Fall Conference
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• 2006.05a
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• pp.209-213
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• 2006

In this paper describes image enhancement technique using deconvolution processing for ultrasonic nondestructive testing. . When flaws are detected for B-scan or C-scan, blurring effect which is caused by the moving intervals of transducer degrades the quality of images. In addition, acquisited images suffer form speckle noise which is caused by the ultrasonic components reflected from the grain boundary of material [1,2]. The deconvolution technique can restore sharp peak value or clean image from blurring signal or image. This processing is applied to C-scan image obtained from known specimen. Experimental results show that the deconvolution processing contributes to get improved the quality of C-scan images.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.6
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• pp.199-208
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• 1994

This paper proposes a delay fault test technique for ICs and PCBs with the boundary-scan architectures supporting ANSI/IEEE Std 1149.1-1990. The hybrid delay fault model, which comprises both of gate delay faults and path delay faults, is selected. We developed a procedure for testing delay faults in the circuits with typical boundary scan cells supporting the standard. Analyzing it,we concluded that it is impractical because the test clock must be 2.5 times faster than the system clock with the cell architect-ures following up the state transition of the TAP controller and test instruction set. We modified the boundary-scan cell and developed test instructions and the test procedure. The modified cell and the procedure need test clock two times slower than the system clock and support the ANSI/IEEE standard perfectly. A 4-bit ALU is selected for the circuits under test. and delay tests are simulated by the SILOS simulator. The simulation results ascertain the accurate operation and effectiveeness of the modified mechanism.