• Title/Summary/Keyword: routing integrated

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Optimal Reservour Operation for Flood Control Using a Hybrid Approach (Case Study: Chungju Multipurpose Reservoir in Korea) (복합 모델링 기법을 이용한 홍수시 저수지 최적 운영 (사례 연구 : 충주 다목적 저수지))

  • Lee, Han-Gu;Lee, Sang-Ho
    • Journal of Korea Water Resources Association
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    • v.31 no.6
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    • pp.727-739
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    • 1998
  • The main objectives o reservoir optimal operation can be described as follows : maximization of the benefits through optimal allocation of the limited water resources for various purpose; minimization of t도 costs by the flood damage in potential damaging regions and risk of dam failure, etc. through safe drainage of a bulky volume of excessive water by a proper reservoir operation. Reviewing the past research works related to reservoir operation, we can find that the study on the matter of the former has been extensively carried out in last decades rather than the matter of the latter. This study is focused on developing a methodology of optimal reservoir operation for flood control, and a case study is performed on the Chungju multipurpose reservoir in Korea. The final goal of the study is to establish a reservoir optimal operation system which can search optimal policy to compromise two conflicting objectives: downstream flood damage and dam safety-upstream flood damage. In order to reach the final goal of the study, the following items were studied : (1)validation of hydrological data using HYMOS: (2)establishment of a downstream flood routing model coupling a rainfall-runoff model and SOBEK system for 1-D hydrodynamic flood routing; (3)replication of a flood damage estimation model by a neural network; (4)development of an integrated reservoir optimization module for an optimal operation policy.

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Study on the Design of Operation Scenario for Replacement of a Railway Signaling System (철도신호시스템 교체에 따른 운행 시나리오 도출에 관한 연구)

  • Jeong, Rag-Gyo;Kim, Baek-Hyun;Kang, Seok-Won;Kho, Young-Hwan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.63 no.8
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    • pp.1064-1069
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    • 2014
  • The railway signalling system plays an essential role in the headway and routing control for a safe and efficient train operation. The reliable and safe operation of the system is very important because the failure of the railway signalling system can lead to the collision, derailment, or unexpected stop of a train. So far, the conventional wayside signal mode (ATS: Automatic Train Stop) has been generally used as the railway signalling system. However, this system is highly linked to a risk of major accidents resulted from human mistakes such as missing a signal or careless control of train speed. Accordingly, the onboard signal mode (ATC: Automatic Train Control) as an alternative of ATS has been recently introduced and applied to transmit effectively the information on speed control of a train by using computers and communication equipment. In the process of replacing the obsolete signal system, it is necessary to switch over the system while providing passengers with normal services. Therefore, the integration of a railway signaling system compatible for both ATS and ATC and its interface is discussed in this study. In particular, the implementation scenario required for operation planning of the integrated system was designed, and the results as well as effects of its applicability test were also presented.

A Low Power FPGA Architecture using Three-dimensional Structure (3차원 구조를 이용한 저전력 FPGA 구조)

  • Kim, Pan-Ki;Lee, Hyoung-Pyo;Kim, Hyun-Pil;Jun, Ho-Yoon;Lee, Yong-Surk
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.12
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    • pp.656-664
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    • 2007
  • Field-Programmable Gate Arrays (FPGAs) are a revolutionary new type of user-programmable integrated circuits that provide fast, inexpensive access to customized VLSI. However, as the target application speed increases, power-consumption and wire-delay on interconnection become more critical factors during programming an FPGA. Especially, the interconnection of the FPGA consumes 65% of the total FPGA power consumption. A previous research show that if the length of interconnection is shirked, power-consumption can be reduced because an interconnection has a lot of effect on power-consumption. For solving this problem that reducing the number of wires routed, the three dimension FPGA is proposed. However, this structure physical wires and an area of switches is increased by making topology complex. This paper propose a novel FPGA architecture that modifies the three dimension FPGA and compare the number of interconnection of Virtex II and 3D FPGA with the proposed FPGA architecture using the FPGA Editor of Xilinx ISE and a global routing and length estimation program.

Multi-layer Network Virtualization for QoS Provisioning in Tactical Networks (전술망의 서비스 품질 보장을 위한 다계층 네트워크 가상화 기법)

  • Kim, Yohan;An, Namwon;Park, Juman;Park, Chan Yi;Lim, Hyuk
    • Journal of the Korea Institute of Military Science and Technology
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    • v.21 no.4
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    • pp.497-507
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    • 2018
  • Tactical networks are evolving into an All-IP based network for network centric warfare(NCW). Owing to the flexibility of IP based network, various military data applications including real-time and multi-media services are being integrated in tactical networks. Because each application has diverse Quality-of-service(QoS) requirements, it is crucial to develop a QoS provisioning method for guaranteeing QoS requirements efficiently. Conventionally, differentiated services(DiffServ) have been used to provide a different level of QoS for traffic flows. However, DiffServ is not designed to guarantee a specific requirement of QoS such as delay, loss, and bandwidth. Therefore, it is not suitable for military applications with a tight bound of QoS requirements. In this paper, we propose a multi-layer network virtualization scheme that allocates traffic flows having different QoS requirements to multiple virtual networks, which are constructed to support different QoS policies such as virtual network functions(VNFs), routing, queueing/active queue management(AQM), and physical layer policy. The experiment results indicate that the proposed scheme achieves lower delays and losses through multiple virtual networks having differentiated QoS policies in comparison with conventional networks.

A Development of a Path-Based Traffic Assignment Algorithm using Conjugate Gradient Method (Conjugate Gradient 법을 이용한 경로기반 통행배정 알고리즘의 구축)

  • 강승모;권용석;박창호
    • Journal of Korean Society of Transportation
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    • v.18 no.5
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    • pp.99-107
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    • 2000
  • Path-based assignment(PBA) is valuable to dynamic traffic control and routing in integrated ITS framework. As one of widely studied PBA a1gorithms, Gradient Projection(GP) a1gorithm typically fields rapid convergence to a neighborhood of an optimal solution. But once it comes near a solution, it tends to slow down. To overcome this problem, we develop more efficient path-based assignment algorithm by combining Conjugate Gradient method with GP algorithm. It determines more accurate moving direction near a solution in order to gain a significant advantage in speed of convergence. Also this algorithm is applied to the Sioux-Falls network and verified its efficiency. Then we demonstrate that this type of method is very useful in improving speed of convergence in the case of user equilibrium problem.

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Circuit Partitioning Using A New Quadratic Boolean Programming Formulation for Reconfigurable Circuit Boards (재구성 가능한 회로 보드를 위한 새로운 Quadratic Boolean Programming 수식에 의한 분할)

  • Choe, Yeon-Gyeong;Im, Jong-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.2
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    • pp.65-77
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    • 2000
  • We propose a new formulation by quadratic boolean programming to partition circuits for FPGA based reconfigurable circuit boards, in which the routing topology among IC chips are predetermined. The formulation is to minimize the sum of the wire length by considering the nets passing through IC chips for the interconnections between chips which are not adjacent, in addition to the constraints considered by the previous partition methods. We also describe a heuristic method, which consist of module assignment method to efficiently solve the problem. Experimental results show that our method generates the partitions in which the given constraints are all satisfied for all the benchmark circuits tested. The pin utilization are reduced for the most of the circuits and the total wire length of the routed nets are improved up to 34.7% compared to the previous method.

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Comparisons of Interfacial Reaction Characteristics on Flip Chip Package with Cu Column BOL Enhanced Process (fcCuBE®) and Bond on Capture Pad (BOC) under Electrical Current Stressing

  • Kim, Jae Myeong;Ahn, Billy;Ouyang, Eric;Park, Susan;Lee, Yong Taek;Kim, Gwang
    • Journal of the Microelectronics and Packaging Society
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    • v.20 no.4
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    • pp.53-58
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    • 2013
  • An innovative packaging solution, Flip Chip with Copper (Cu) Column bond on lead (BOL) Enhanced Process (fcCuBE$^{(R)}$) delivers a cost effective, high performance packaging solution over typical bond on capture pad (BOC) technology. These advantages include improved routing efficiency on the substrate top layer thus allowing conversion functionality; furthermore, package cost is lowered by means of reduced substrate layer count and removal of solder on pad (SOP). On the other hand, as electronic packaging technology develops to meet the miniaturization trend from consumer demand, reliability testing will become an important issue in advanced technology area. In particular, electromigration (EM) of flip chip bumps is an increasing reliability concern in the manufacturing of integrated circuit (IC) components and electronic systems. This paper presents the results on EM characteristics on BOL and BOC structures under electrical current stressing in order to investigate the comparison between two different typed structures. EM data was collected for over 7000 hours under accelerated conditions (temperatures: $125^{\circ}C$, $135^{\circ}C$, and $150^{\circ}C$ and stress current: 300 mA, 400 mA, and 500 mA). All samples have been tested without any failures, however, we attempted to find morphologies induced by EM effects through cross-sectional analysis and investigated the interfacial reaction characteristics between BOL and BOC structures under current stressing. EM damage was observed at the solder joint of BOC structure but the BOL structure did not show any damage from the effects of EM. The EM data indicates that the fcCuBE$^{(R)}$ BOL Cu column bump provides a significantly better EM reliability.

A Study on Systems Engineering Based Compliance Procedure for A-SMGCS (시스템 엔지니어링을 적용한 A-SMGCS 적합성 검증 방안 연구)

  • Seol, Eun-Suk;Kim, Sang-Hun;Ku, Sung-Kwan;Cho, Jeong-Hyun
    • Journal of Advanced Navigation Technology
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    • v.19 no.1
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    • pp.33-40
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    • 2015
  • Advanced surface movement guidance and control system (A-SMGCS) is a system providing routing, guidance and surveillance for the control of aircraft and vehicles in order to maintain the predetermined surface movement rate under all weather conditions while maintaining the required level of safety. In the present study, system engineering was introduced to develop the compliance procedure for the A-SMGCS. At first, requirements for the level IV A-SMGCS were defined and analyzed from the concept of operations (CONOPS). Then, system architecture and specifications were constructed through the functional analysis and allocation. After that, work breakdown structure (WBS) and related integrated master schedule (IMS) were established. Lastly, compliance checklist (CCL) and test and evaluation master plan (TEMP) were developed to verify and validate the system.

Vital Sign Monitoring System with Routing and Query of Wireless Sensor Node on Mobile Environment (모바일 환경에서 질의응답이 가능한 무선센서노드 라우팅 생체신호 모니터링 시스템)

  • Lee, Seung-Chul;Toh, Sing-Hui;Do, Kyeong-Hoon;Chung, Wan-Young
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.357-360
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    • 2008
  • Vital sign monitoring system using IEEE 502.IS.4 based wireless sensor network(WSN) is designed and developed on mobile environment and sensor node platform. WSN and CDMA are integrated to create a wide coverage to support various environments like inside and outside. We developed query processor to use selective any devices(ECG, Blood pressure and sugar module) and control of the self-organizing network of sensor nodes in a wireless sensor network. Vital sign from wireless medical any devices are analysed in cell phone first for real time signal analyses and the abnormal vital signs are sent and save to hospital server for detail signal processing. wireless signal traffic in wireless sensor network environment or data communication inside the cell phone is reduced.

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Cycle Property in the (n,k)-star Graph ((n,k)-스타 그래프의 사이클 특성)

  • Chang, Jung-Hwan
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.5
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    • pp.1464-1473
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    • 2000
  • In this paper, we analyze the cycle property of the (n,k)-star graph that has an attention as an alternative interconnection network topology in recent years. Based on the graph-theoretic properties in (n,k)-star graphs, we show the pancyclic property of the graph and also present the corresponding algorithm. Based on the recursive structure of the graph, we present such top-down approach that the resulting cycle can be constructed by applying series of "dimension expansion" operations to a kind of cycles consisting of sub-graphs. This processing naturally leads to such property that the resulting cycles tend to be integrated compactly within some minimal subset of sub-graphs, and also means its applicability of another classes of the disjoint-style cycle problems. This result means not only the graph-theoretic contribution of analyzing the pancyclic property in the underlying graph model but also the parallel processing applications such a as message routing or resource allocation and scheduling in the multi-computer system with the corresponding interconnection network.

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