• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2000.07a
• /
• pp.332-335
• /
• 2000

We fabricated organic electroluminescent (EL) devices with single layer of poly(3-dodeoylthiophene) (P3DoDT) hlended with different amounts of poly(N-vinylcarbazole) (PVK) as a emitting layer. The molar ratio between P3DoDT and PVK changed with 1:0, 2:1 and 1:1. To improve the external quantum efficiency of EL devices, we applied insulating layer, LiF layer, between polymer emitting layer and Al electrode. All of the devices emit orange-red light and it's can be explained that the energy transfer occurs from PVK to P3DoDT. In the voltage-current and voltage-brightness characteristics of devices applied LiF layer, current and brightness increased with increasing applied voltage. The brightness of the device have a molar ratio 1:1 with LiF layer was about 10 times larger than that of the device without PVK at 6V. Electrical impedance properties of ITO/emitting layer/LiF/Al devices were investigated. In the Cole-Cole plots of impedance data, one semicircle was observed. Therefore, the equivalent circuit for the devices can be designed as a single parallel resistor and capacitor network with series resistor.

• Journal of the Microelectronics and Packaging Society
• /
• v.20 no.4
• /
• pp.75-79
• /
• 2013

A power distribution network (PDN) is a network that provides connection between the voltage source supply and the power/ground terminals of a microprocessor chip. It consists of a voltage regulator module, a printed circuit board, a package substrate, a microprocessor chip as well as decoupling capacitors. For power integrity analysis, the board and package layouts have to be transformed into an electrical network of resistor, inductor and capacitor components which may be expressed using the S-parameters models. This modeling process generally takes from several hours up to a few days for a complete board or package layout. When the board and package layouts change, they need to be re-extracted and the S-parameters models also need to be re-generated for power integrity assessment. This not only consumes a lot of resources such as time and manpower, the task of PDN modeling is also tedious and mundane. In this paper, a block-based PDN modeling is proposed. Here, the board or package layout is partitioned into sub-blocks and each of them is modeled independently. In the event of a change in power rails routing, only the affected sub-blocks will be reextracted and re-modeled. Simulation results show that the proposed block-based PDN modeling not only can save at least 75% of processing time but it can, at the same time, keep the modeling accuracy on par with the traditional PDN modeling methodology.

• ETRI Journal
• /
• v.31 no.5
• /
• pp.601-603
• /
• 2009

This letter presents a high performance 2.4 GHz two-stage power amplifier (PA) operating in the temperature range from $-30^{\circ}C$ to $+85^{\circ}C$ for IEEE 802.11g, wireless local area network application. It is implemented in InGaP/GaAs hetero-junction bipolar transistor technology and has a bias circuit employing a temperature compensation technique for error vector magnitude (EVM) performance. The technique uses a resistor made with a base layer of HBT. The design improves EVM performance in cold temperatures by increasing current. The implemented PA has a dynamic EVM of less than 4%, a gain of over 26 dB, and a current less than 130 mA below the output power of 19 dBm across the temperature range from $-30^{\circ}C$ to $+85^{\circ}C$.

• Journal of the Microelectronics and Packaging Society
• /
• v.24 no.3
• /
• pp.1-6
• /
• 2017

As the performance and density of IC devices increase, especially the clock frequency increases, power grid network integrity problems become more challenging. To resolve these power integrity problems, the use of passive devices such as resistor, inductor, and capacitor is very important. To manage the power integrity with little noise or ripple, decoupling capacitors are essential in electronic packaging. The decoupling capacitors are classified into voltage regulator capacitor, board capacitor, package capacitor, and on-chip capacitor. For next generation packaging technologies such as 3D packaging or wafer level packaging on-chip MIM decoupling capacitor is the key element for power distribution and delivery management. This paper reviews the use and necessity of on-chip decoupling capacitor.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.27 no.8
• /
• pp.1255-1259
• /
• 1990

A new ripple analog-to-digital converter (ADC) has been developed. It consists of two parallel ADCs and a switching network. The circuit operates on the analog input signal in two serial steps. First, a coarse conversion is made to determine the most significant bits by the first parallel ADC. The resultant bits control the switching network to connect a series resistor segment, within which the analog signal is contained, to the second parallel ADC. At second step, a fine conversion is made to determine the least significant bits by the second parallel ADC. The circuit requires 2(2\ulcorner\ulcorner1) comparators, 2(2\ulcorner\ulcorner resistors, and 2(2\ulcorner\ulcorner swithches for N-bit resolution.

• Proceedings of the KIEE Conference
• /
• 1988.07a
• /
• pp.571-573
• /
• 1988

A new ripple analog-to-digital converter(ADC) has been developed. It consists of two parallel ADCs and a switching network. The circuit operates on the input signal in two serial steps. First a coarse conversion is made to determine the most significant bits by the first parallel ADC. The results control a switching network to connect the series resistor segment, the analog signal is contained within, to the second parallel ADC. At second step, a fine conversion is made to determine the least signification bits by the second parallel ADC. The circuit requires 2(2$\frac{N}{2}$) comparators, 2(2$\frac{N}{2}$) resistors, and 2(2$\frac{N}{2}$) switches for N-bit resolution.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.11 no.3
• /
• pp.172-178
• /
• 1986

The recent interest in the design of filters is motivatied by the fact that such filter can be fully integrated using standard metal-oxide-semiconductor processing technology. This is due to replacing all the resistors in the active RC filter network by the switched capacitors. The voltage gain of a SC filter depends only on the rations of capacitance and these ratios can be obtained and maintained to high accuracy. Therefore, it is known that a switched capacitor is much better than a resistor in temperature and linearity characteristics. This paper proposed a programmable SC filter and proved the fact that ${omega}_0$ Q and G of this circuit can be controlled by digital signal. Experiments show that SC filter remains the low sensitivities but it can't avoid little influence of parasitic capacitance. As the transfer characteristic of the SC filter is varied with sampling frequency and resistor array, SC filtering technigue can be applied for digital processing, speech analysis and synthesis and so on.

• Progress in Superconductivity
• /
• v.7 no.2
• /
• pp.114-119
• /
• 2006

High critical current density, high n value, multiple faults endurances, and fast recovery characteristics of YBCO thin films are very attractive characteristics for developing resistive type superconducting fault current limiters. But due to the limited current and voltage ratings of one YBCO module, it is needed to construct series and parallel module connections for high capacity electric networks. Especially for distribution network, more than 30 units should be connected in series to meet voltage level. So in order to construct distribution-level superconducting fault current limiter, simultaneous quench in one YBCO thin films should be realized, and furthermore, quench should be occurred in all fault current limiting units equally to avoid local heating and failures. In this paper, we proposed optimum design of YBCO thin films for fault current limiting module and technical method using shunt resistor to achieve simultaneous quench between multi current limiting units. From the analytical and the experimental results, optimal current path and thickness of shunt material was determined for YBCO thin films and shunt resistor between modules was developed. Finally, 14 kV one phase resistive fault current limiter using multi YBCO thin films was constructed and it was possible to get satisfactory test results.

• Structural Engineering and Mechanics
• /
• v.14 no.5
• /
• pp.521-542
• /
• 2002

Application of piezoceramic materials in actuation and sensing of vibration is of current interest. Potential and more popular applications of piezoceramics are probably in the field of active vibration control. However, the objective of this work is to investigate the effect of shunted piezoceramics as passive vibration control devices when bonded to a host structure. Resistive shunting of a piezoceramic bonded to a cantilevered duralumin beam has been investigated. The piezoceramic is connected in parallel to an electrical network comprising of resistors and inductors. The piezoceramic is a capacitor that stores and discharges electrical energy that is transformed from the mechanical motion of the structure to which it is bonded. A resistor across the piezoceramic would be termed as a resistively shunted piezoceramic. Similarly, an inductor across the piezoceramic is termed as a resonantly shunted piezoceramic. In this study, the effect of resistive shunting on the nature of damping enhancement to the host structure has been investigated. Analytical studies are presented along with experimental results.

• Proceedings of the Optical Society of Korea Conference
• /
• 1990.02a
• /
• pp.136-140
• /
• 1990

A hybrid wideband amplifier having bandwidth from 5MHz to 2000MHz with a gain of 10db$\pm$3dB is designed and implemented by using a lossy matched network and GaAs FET. The implemented amplifier circuit operates as a capacitor-resistor(C-R) coupled amplifier circuit in the low frequency range (below 800 MHz) in which {{{{ LEFT $\mid$ S_{21 } RIGHT $\mid$ }} for the GaAs FET is constant. It also operates as a lossless impedance matching circuit in the microwave frequency range in which S21 for the GaAs FET has a slope of approximately -6dB/octave. Using this configuration technique, Two stage GaAs FET amplifier implemented is measured to 10dB gain within a 3dB fluctuation over the frequency band from 5 to 2000MHz.