• Title/Summary/Keyword: receiver

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6.25-Gb/s Optical Receiver Using A CMOS-Compatible Si Avalanche Photodetector

  • Kang, Hyo-Soon;Lee, Myung-Jae;Choi, Woo-Young
    • Journal of the Optical Society of Korea
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    • v.12 no.4
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    • pp.217-220
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    • 2008
  • An optical receiver using a CMOS-compatible avalanche photodetector (CMOS-APD) is demonstrated. The CMOS-APD is fabricated with $0.18{\mu}m$ standard CMOS technology and the optical receiver is implemented by using the CMOS-APD and a transimpedance amplifier on a board. The optical receiver can detect 6.25-Gb/s data with the help of the series inductive peaking effect.

Development of differential beacon receiver (Differential Beacon 수신기 개발)

  • 정일영;손석보;이상정
    • 제어로봇시스템학회:학술대회논문집
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    • 1996.10b
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    • pp.1388-1391
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    • 1996
  • This paper presents the structure and functions of the differential beacon receiver for receiving DGPS error correction data. The differential beacon receiver is designed using commercially available components. Its functions are being implemented and tested in laboratory. Filed test is scheduled for the end of this year.

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Wide Voltage Input Receiver with Hysteresis Characteristic to Reduce Input Signal Noise Effect

  • Biswas, Arnab Kumar
    • ETRI Journal
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    • v.35 no.5
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    • pp.797-807
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    • 2013
  • In this paper, an input receiver with a hysteresis characteristic that can work at voltage levels between 0.9 V and 5 V is proposed. The input receiver can be used as a wide voltage range Schmitt trigger also. At the same time, reliable circuit operation is ensured. According to the research findings, this is the first time a wide voltage range Schmitt trigger is being reported. The proposed circuit is compared with previously reported input receivers, and it is shown that the circuit has better noise immunity. The proposed input receiver ends the need for a separate Schmitt trigger and input buffer. The frequency of operation is also higher than that of the previously reported receiver. The circuit is simulated using HSPICE at 0.35-${\mu}m$ standard thin oxide technology. Monte Carlo analysis is conducted at different process conditions, showing that the proposed circuit works well for different process conditions at different voltage levels of operation. A noise impulse of ($V_{CC}/2$) magnitude is added to the input voltage to show that the receiver receives the correct logic level even in the presence of noise. Here, $V_{CC}$ is the fixed voltage supply of 3.3 V.

An MCS Level Adaptive Linear Receiver (MCS 레벨에 따른 적응 선형 수신기)

  • Lee, Kyuhee;Kim, Jaekwon;Yun, Sangkyun
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.2 no.1
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    • pp.59-64
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    • 2009
  • In this paper, a novel low complexity linear receiver is proposed that is used at the receiver of MIMO systems. Zero-forcing (ZF) and minimum mean squared error (MMSE) receivers are common linear receivers. ZF receiver is simpler than MMSE receiver from the hardware implementation perspective, howerver, MMSE shows better performance than ZF. In general, MCS level changes according to channel condition. This paper shows the benefit of choosing between MMSE and ZF according to the selected MCS level. We implement the MCS-adaptive linear receiver as hardware, and show that its complexity is comparable to the conventional MMSE receiver.

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Receiver-driven Cooperation-based Concurrent Multipath Transfer over Heterogeneous Wireless Networks

  • Cao, Yuanlong;Liu, Qinghua;Zuo, Yi;Huang, Minghe
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.9 no.7
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    • pp.2354-2370
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    • 2015
  • The advantages of employing SCTP-based Concurrent Multipath Transfer (CMT) have been demonstrated to be very useful for data delivery over multi-homed wireless networks. However, there is still significant ongoing work addressing some remaining limitations and challenges. The most important concern when applying CMT to data delivery is related to handling packet reordering and buffer blocking. Another concern on this topic is that current sender-based CMT solutions seldom consider balancing the overhead and sharing the load between the sender and receiver. This paper proposes a novel Receiver-driven Cooperation-based Concurrent Multipath Transfer solution (CMT-Rev) with the following aims: (i) to balance overhead and share load between the sender and receiver, by moving some functions including congestion and flow control from the sender onto receiver; (ii) to mitigate the data reordering and buffer blocking problems, by using an adaptive receiver-cooperative path aggregation model, (iii) to adaptively transmit packets over multiple paths according to their receiver-inspired sending rate values, by employing a new receiver-aware data distribution scheduler. Simulation results show that CMT-Rev outperforms the existing CMT solutions in terms of data delivery performance.

A GPS Receiver Structure for Multi-beamforming (다중 빔 형성을 위한 GPS 수신기 구조)

  • Lee, Geon-Woo;Lim, Deok-Won;Lee, Chang-Won;Park, Chan-Sik;Hwang, Dong-Hwan;Lee, Sang-Jeong
    • Journal of the Korea Institute of Military Science and Technology
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    • v.12 no.2
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    • pp.182-190
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    • 2009
  • GPS receivers can be disrupted by intentional or unintentional jamming, then it is unable to receive GPS signals and it is impossible to get the correct navigation results. Anti-jamming schemes using array antennas are being studied well due to high performance of those, and the efforts to apply them to GPS receiver are also being done. A GPS receiver structure for a multiple beam-forming scheme among those schemes has been proposed in this paper, and the performance is also compared with that using a general GPS receiver structure. For a general GPS receiver structure, each satellite signal which is formed by a beam-forming scheme is summed to be processed in a part of digital signal processing. For a proposed GPS receiver structure, however, each satellite signal is respectively processed by a designated channel in a part of digital signal processing. Finally, it is confirmed that the proposed GPS receiver structure is superior to a general GPS receiver structure in a point of the carrier to noise power ratio and the navigation accuracy using a software platform.

A Single-Chip, Multichannel Combined R2MFC/DTMF/CCT Receiver Using Digital Signal Processor (DSP 칩을 이용한 다중채널 R2MFC/DTMF/CCT 겸용 수신기)

  • 김덕환;이형호;김대영
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.10
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    • pp.21-31
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    • 1994
  • This paper describes the multichannel combined R2MFC/DTMF/CCT reciver which provides a signaling service functions for call processing control in digital switching system. Using the TMS320C25 DSP chip, we have implemented multi-function receriver shich processes 8 channels of R2MFC, DTMF, and CCT signals simultaneously. In order to increase the channel multiplicity of the combined receiver. R2MFC and CCT receiver were employed by discrete Fourier transform(DFT) method using Goertzel algorithm, and DTMFreceiver was employ by infinite impulse reponse(IIR) filtering method using 4KHz subsampling technique. The combined receiver has 4 function modes for each channel such as R2MFC, DTMF, CCT, and Idle modes. The function mode of each channel may be selected at any time by single-chip micro-controller(.mu.C). Hence, the number of channels assigned for each function mode can be adjusted dynamically according to the signaling traffic variations. From the experimental test results using the test-bed, it has been proved that the combined receiver statisfies all receiver satisfies all receiver specifications, and provides good channel multiplicity and performance, Therefore, it may give a great improvement than existing receiver in cost, reliability, availability, and serviceability.

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A CMOS Impulse Radio Ultra-Wideband Receiver for Inner/Inter-chip Wireless Interconnection

  • Nguyen, Chi Nhan;Duong, Hoai Nghia;Dinh, Van Anh
    • Journal of IKEEE
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    • v.17 no.2
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    • pp.176-181
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    • 2013
  • This paper presents a CMOS impulse radio ultra-wideband (IR-UWB) receiver implemented using IBM 0.13um CMOS technology for inner/inter-chip wireless interconnection. The IR-UWB receiver is based on the non-coherent architecture which removes the complexity of RF architecture (such as DLL or PLL) and reduces power consumption. The receiver consists of three blocks: a low noise amplifier (LNA) with active balun, a correlator, and a comparator. Simulation results show the die area of the IR-UWB receiver of 0.2mm2, a power gain (S21) of 12.5dB, a noise figure (NF) of 3.05dB, an input return loss (S11) of less than -16.5dB, a conversion gain of 18dB, a NFDSB of 22. The receiver exhibits a third order intercept point (IIP3) of -1.3dBm and consumes 22.9mW of power on the 1.4V power supply.

Design and Implementation of the Small Size Microwave Sensor Receiver for Human Body Detection (인체 감지용 소형 마이크로파 센서 수신기의 설계 및 제작)

  • Son, Hong-Min;Choi, Hyun-Ho
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.4
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    • pp.403-406
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    • 2016
  • This paper presents the design and implementation of the small size receiver to put a passive microwave sensor for human body detection to practical use. The requirements and specifications of the sensor receiver are drawn using the experimental data of human body detection by the existing sensor operated at 5.1 GHz. The small size sensor receiver to satisfy the drawn specifications is designed and implemented. The effectiveness of the fabricated sensor with small size receiver on human body detection is demonstrated experimentally in laboratory. The results show the sensor can detect human body to within 4 m distance from the antenna. The size and power consumption of the small size receiver are decreased to 60 % and 40 % compared to those of the existing receiver, respectively.

Receiver Protection from Electrical Shock in Vehicle Wireless Charging Environments

  • Park, Taejun;Hwang, Kwang-il
    • Journal of Information Processing Systems
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    • v.16 no.3
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    • pp.677-687
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    • 2020
  • This paper deals with the electrical shock that can occur in a car wireless charging system. The recently released the Wireless Power Consortium (WPC) standard specifies that the receiver must be protected from the radio power generated by the transmitter and presents two scenarios in which the receiver may be subjected to electrical shock due to the wireless power generated by the transmitter. The WPC also provides a hardware approach for blocking the wireless power generated by the transmitter to protect the receiver in each situation. In addition, it presents the hardware constraints that must be applied to the transmitter and the parameters that must be constrained by the software. In this paper, we analyze the results of the electric shock in the vehicle using the WPC certified transmitter and receiver in the scenarios presented by WPC. As a result, we found that all the scenarios had electrical shocks on the receiver, which could have a significant impact on the receiver circuitry. Therefore, we propose wireless power transfer limit (WPTL) algorithm to protect receiver circuitry in various vehicle charging environments.