• 제목/요약/키워드: real time image processing

검색결과 1,337건 처리시간 0.035초

어안렌스 카메라의 영상왜곡보정처리 시스템 구현 (Image Distortion Correction Processing System Realization for Fisheye Lens Camera)

  • 류광렬;김자환
    • 한국정보통신학회논문지
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    • 제11권11호
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    • pp.2116-2120
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    • 2007
  • 본 논문은 어안 렌즈 카메라의 영상 왜곡 보정 처리 시스템 구현에 관한 것이다. 영상 보정 처리 알고리즘은 역맵핑기법을 적용하고 실시간 처리를 위해 DSP 프로세서를 사용하여 시스템을 구현하였다. 알고리즘 적용시 카메라의 왜곡 계수는 실시간 처리를 위해 룩업 테이블화하여 처리한다. 실험 결과, 원영상과 각도변화에 대한 PSNR 변화는 8.3%정도로 안정적 자연스러우며, 화질보다는 실시간 처리에 중점을 두어 한 프레임 $720{\times}480$ 왜곡영상 처리 시간이 약 31.3ms 소요되었다.

원근 왜곡 보정의 실시간 구현 방법 (Realtime Implementation Method for Perspective Distortion Correction)

  • 이동석;김남규;권순각
    • 한국멀티미디어학회논문지
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    • 제20권4호
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    • pp.606-613
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    • 2017
  • When the planar area is captured by the depth camera, the shape of the plane in the captured image has perspective projection distortion according to the position of the camera. We can correct the distorted image by the depth information in the plane in the captured area. Previous depth information based perspective distortion correction methods fail to satisfy the real-time property due to a large amount of computation. In this paper, we propose the method of applying the conversion table selectively by measuring the motion of the plane and performing the correction process by parallel processing for correcting perspective projection distortion. By appling the proposed method, the system for correcting perspective projection distortion correct the distorted image, whose resolution is 640x480, as 22.52ms per frame, so the proposed system satisfies the real-time property.

화상처리에 의한 XLPE의 트리잉 해석 (An Analysis on Treeing in XLPE by means of Image Processing)

  • 이재봉;임장섭;정우성;김태성
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1994년도 추계학술대회 논문집
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    • pp.122-128
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    • 1994
  • Studies on treeing phenomena have depended on the visual measurement using optical microscope. In the visual measurement, it is difficult to analyze the treeing in real time because voltages are applied discontinuously and impossible to calculate the deterioated area by treeing. Only tree type and length are studied. In this paper, image processing is introduced and voltages are applied continuously. The tree length and area are calculated in real time from tree inception to breakdown. Growing characteristics about tree types are compared for the normalized breakdown time.

웨이블릿 다해상도 분석에 의한 디지털 이미지 결점 검출 알고리즘 (A Defect Inspection Algorithm Using Multi-Resolution Analysis based on Wavelet Transform)

  • 김경준;이창환;김주용
    • 한국염색가공학회지
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    • 제21권1호
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    • pp.53-58
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    • 2009
  • A real-time inspection system has been developed by combining CCD based image processing algorithm and a standard lighting equipment. The system was tested for defective fabrics showing nozzle contact scratch marks, which were one of the frequently occurring defects. Multi-resolution analysis(MRA) algorithm were used and evaluated according to both their processing time and detection rate. Standard value for defective inspection was the mean of the non-defect image feature. Similarity was decided via comparing standard value with sample image feature value. Totally, we achieved defective inspection accuracy above 95%.

SoC FPGA 기반 실시간 객체 인식 및 추적 시스템 구현 (An Implementation of SoC FPGA-based Real-time Object Recognition and Tracking System)

  • 김동진;주연정;박영석
    • 대한임베디드공학회논문지
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    • 제10권6호
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    • pp.363-372
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    • 2015
  • Recent some SoC FPGA Releases that integrate ARM processor and FPGA fabric show better performance compared to the ASIC SoC used in typical embedded image processing system. In this study, using the above advantages, we implement a SoC FPGA-based Real-Time Object Recognition and Tracking System. In our system, the video input and output, image preprocessing process, and background subtraction processing were implemented in FPGA logics. And the object recognition and tracking processes were implemented in ARM processor-based programs. Our system provides the processing performance of 5.3 fps for the SVGA video input. This is about 79 times faster processing power than software approach based on the Nios II Soft-core processor, and about 4 times faster than approach based the HPS processor. Consequently, if the object recognition and tracking system takes a design structure combined with the FPGA logic and HPS processor-based processes of recent SoC FPGA Releases, then the real-time processing is possible because the processing speed is improved than the system that be handled only by the software approach.

Development of a real-time gamma camera for high radiation fields

  • Minju Lee;Yoonhee Jung;Sang-Han Lee
    • Nuclear Engineering and Technology
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    • 제56권1호
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    • pp.56-63
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    • 2024
  • In high radiation fields, gamma cameras suffer from pulse pile-up, resulting in poor energy resolution, count losses, and image distortion. To overcome this problem, various methods have been introduced to reduce the size of the aperture or pixel, reject the pile-up events, and correct the pile-up events, but these technologies have limitations in terms of mechanical design and real-time processing. The purpose of this study is to develop a real-time gamma camera to evaluate the radioactive contamination in high radiation fields. The gamma camera is composed of a pinhole collimator, NaI(Tl) scintillator, position sensitive photomultiplier (PSPMT), signal processing board, and data acquisition (DAQ). The pulse pile-up is corrected in real-time with a field programmable gate array (FPGA) using the start time correction (STC) method. The STC method corrects the amplitude of the pile-up event by correcting the time at the start point of the pile-up event. The performance of the gamma camera was evaluated using a high dose rate 137Cs source. For pulse pile-up ratios (PPRs) of 0.45 and 0.30, the energy resolution improved by 61.5 and 20.3%, respectively. In addition, the image artifacts in the 137Cs radioisotope image due to pile-up were reduced.

FPGA-Based Real-Time Multi-Scale Infrared Target Detection on Sky Background

  • Kim, Hun-Ki;Jang, Kyung-Hyun
    • 한국컴퓨터정보학회논문지
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    • 제21권11호
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    • pp.31-38
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    • 2016
  • In this paper, we propose multi-scale infrared target detection algorithm with varied filter size using integral image. Filter based target detection is widely used for small target detection, but it doesn't suit for large target detection depending on the filter size. When there are multi-scale targets on the sky background, detection filter with small filter size can not detect the whole shape of the large targe. In contrast, detection filter with large filter size doesn't suit for small target detection, but also it requires a large amount of processing time. The proposed algorithm integrates the filtering results of varied filter size for the detection of small and large targets. The proposed algorithm has good performance for both small and large target detection. Furthermore, the proposed algorithm requires a less processing time, since it use the integral image to make the mean images with different filter sizes for subtraction between the original image and the respective mean image. In addition, we propose the implementation of real-time embedded system using FPGA.

FPGA를 이용한 실시간 영상 워핑 구현 (An Implementation of Real-time Image Warping Using FPGA)

  • 류정래;이은상;도태용
    • 대한임베디드공학회논문지
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    • 제9권6호
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    • pp.335-344
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    • 2014
  • As a kind of 2D spatial coordinate transform, image warping is a basic image processing technique utilized in various applications. Though image warping algorithm is composed of relatively simple operations such as memory accesses and computations of weighted average, real-time implementations on embedded vision systems suffer from limited computational power because the simple operations are iterated as many times as the number of pixels. This paper presents a real-time implementation of a look-up table(LUT)-based image warping using an FPGA. In order to ensure sufficient data transfer rate from memories storing mapping LUT and image data, appropriate memory devices are selected by analyzing memory access patterns in an LUT-based image warping using backward mapping. In addition, hardware structure of a parallel and pipelined architecture is proposed for fast computation of bilinear interpolation using fixed-point operations. Accuracy of the implemented hardware is verified using a synthesized test image, and an application to real-time lens distortion correction is exemplified.

Novel Parallel Approach for SIFT Algorithm Implementation

  • Le, Tran Su;Lee, Jong-Soo
    • Journal of information and communication convergence engineering
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    • 제11권4호
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    • pp.298-306
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    • 2013
  • The scale invariant feature transform (SIFT) is an effective algorithm used in object recognition, panorama stitching, and image matching. However, due to its complexity, real-time processing is difficult to achieve with current software approaches. The increasing availability of parallel computers makes parallelizing these tasks an attractive approach. This paper proposes a novel parallel approach for SIFT algorithm implementation using a block filtering technique in a Gaussian convolution process on the SIMD Pixel Processor. This implementation fully exposes the available parallelism of the SIFT algorithm process and exploits the processing and input/output capabilities of the processor, which results in a system that can perform real-time image and video compression. We apply this implementation to images and measure the effectiveness of such an approach. Experimental simulation results indicate that the proposed method is capable of real-time applications, and the result of our parallel approach is outstanding in terms of the processing performance.

소형 적외선영상 호밍시스템용 고속 실시간 영상신호처리기 개발 (Development of High-Speed Real-Time Image Signal Processing Unit for Small Infrared Image Tracking Radar)

  • 김홍락;박진호;김경일;전효원;신정섭
    • 한국인터넷방송통신학회논문지
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    • 제21권4호
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    • pp.43-49
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    • 2021
  • 소형 적외선영상 호밍시스템은 지상의 표적에 대하여 주야간 적외선 영상처리를 통하여 표적을 식별하고 주요 표적에 대하여 표적을 탐색, 탐지하여 추적하는 적외선 영상센서를 보유한 추적시스템이다. 본 논문에서는 지상의 표적을 주야간 적외선 영상을 통하여 표적 정보를 획득하여 실시간 영상처리를 통하여 표적을 식별하기 위한 고속의 CPU와 FPGA(Field Programmable Gate Array)가 탑재된 보드 개발의 내용을 설명한다. CPU, FPGA 선정과 영상신호처리를 위한 CPU-FPGA 결합 아키텍처에 대하여 제안하고 또한 김발구조의 적외선센서를 제어하기 위한 FPGA를 활용에 대하여 설명한다.