• Title/Summary/Keyword: reactive plasma etching

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Characterization of the SOI wafer by Pseudo-MOS transistor (Pseudo-MOSFET을 이용한 SOI wafer 특성 분석)

  • Kwon, Kyung-Wook;Lee, Jong-Hyun;Yu, In-Sik;Woo, Hyung-Joo;Bae, Young-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.21-24
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    • 2004
  • Pseudo-MOSFET의 제작을 위해서는 표면 실리콘 층의 식각 공정이 필요하며, 공정의 간편성으로 인해 주로 RIE(Reactive Ion Etching)를 사용하고 있다. 하지만, RE 공정 도중 발생하는 Plasma에 의해서 SOI 층이 손상을 받게 되고 이 영향으로 소자의 특성이 열화 될 가능성이 있다. 이러한 특성의 열화를 확인하기 위하여 소자 제작을 위한 표면 실리콘 층의 식각을 RIE 공정과 TMAH 용액을 이용한 습식 식각을 각각 행하여 그 특성을 비교한 결과, 건식 식각된 시편에서 계면상태 밀도의 증가, 이동도의 감소 등 특성 열화 현상이 현저히 나타났다. 이러한 RIE 공정 중 발생하는 손상을 제거하기 위하여 저온 열처리를 하였으며 그 결과 $400^{\circ}C$ $N_2$ 분위기에서 4시간 동안 열처리를 하여 습식 식각된 시편과 동일한 특성을 가지게 할 수 있었다.

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Fabrication and Characteristic of NOx Gas Sensor by Using $SnO_2$ Nanowires ($SnO_2$ 나노와이어를 이용한 NOx 가스센서 제작 및 특성평가)

  • Kang, Gyo-Sung;Kwon, Soon-Il;Park, Jea-Hwan;Yang, Kea-Joon;Lim, Dong-Gun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.11a
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    • pp.40-41
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    • 2007
  • $SnO_2$ nanowires are used at the nanoscale level for the electrical transduction of the gas interaction with these sensing materials. We report on a study of high sensitivity and fast NOx gas sensor. We focused on improving the response time and refresh time by growth nanowires on the trench structure of Si substrate as air path. To improve refresh time we applied the trench structure with depth of $10\;{\mu}m$ by the inductively coupled plasma reactive ion etching(ICP-RIE). The fabricated device was measured at temperature of $200{\sim}300^{\circ}C$. The sensor exhibit ultra-fast and reversible electrical response (t90% ~4 s for response and ~3 s for recovery).

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CoFeB과 IrMn 자성 박막의 고밀도 반응성 이온 식각

  • Kim, Eun-Ho;So, U-Bin;Gong, Seon-Mi;Jeong, Yong-U;Jeong, Ji-Won
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.232-232
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    • 2010
  • 정보화 산업의 발달은 DRAM, flash memory 등을 포함한 기존의 반도체 메모리 소자를 대체할 수 있는 차세대 메모리 소자에 대한 개발을 요구하고 있다. 특히 magnetic random access memory (MRAM)는 SRAM과 대등한 고속화 그리고 DRAM 보다 높은 기록 밀도가 가능하고 낮은 동작 전압과 소비전력 때문에 대표적인 차세대 비휘발성 메모리로 주목받고 있다. 또한 MRAM소자의 고집적화를 위해서 우수한 프로파일을 갖고 재증착이 없는 나노미터 크기의 magnetic tunnel junction (MTJ) stack의 건식 식각에 대한 연구가 선행되어야 한다. 본 연구에서는 고밀도 반응성 이온 식각법(Inductively coupled plasma reactive ion etching; ICPRIE)을 이용하여 재증착이 없이 우수한 식각 profile을 갖는 CoFeB과 IrMn 박막을 형성하고자 하였다. Photoresist(PR) 및 Ti 박막의 두 가지 마스크를 이용하여 HBr/Ar, HBr/$O_2$/Ar 식각 가스들의 농도를 변화시키면서 CoFeB과 IrMn 박막의 식각 특성들이 조사되었다. 자성 박막과 동일한 조건에 대하여 hard mask로서 Ti가 식각되었다. 좋은 조건을 얻기 위해 HBr/Ar 식각 가스를 이용 식각할 때 pressure, bias voltage, rf power를 변화시켰고 식각조건에서 Ti 하드마스크에 대한 자성 박막들의 selectivity를 조사하고 식각 profile을 관찰하였다. 식각 속도를 구하기 위해 alpha step(Tencor P-1)이 사용되었고 또한 field emission scanning electron microscopy(FESEM)를 이용하여 식각 profile을 관찰함으로써 최적의 식각 가스와 식각 조건을 찾고자 하였다.

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Vortical Etching Characteristics of SrBi$_2$Ta$_2$O$_9$ thin Films Depending on Ar/Cl$_2$ Ratios and RF/DC Power Densities (SrBi$_2$Ta$_2$O$_9$ 박막에 있어서 Ar/C1$_2$가스의 비율 및 RF/DC Power Density의 변화에 따른 수직 식각의 특성연구)

  • 황광명;이창우;김성일;김용태;권영석;심선일
    • Journal of the Microelectronics and Packaging Society
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    • v.8 no.3
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    • pp.49-53
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    • 2001
  • Vortical etching experiments of ($SrBi_2Ta_2O_9$)/Si thin films have been performed by using the inductively coupled plasma reactive ion etching (ICP-ME) apparatus. The purposes of these experiments are to get the effective area of vertical surface. Because this technology is very important to get good qualities of ferroelectric gate structure, capacitor and the minimum parasitic effects related to the excellent performances of the FRAM (Ferroelectric Random Access Memory) device. The reacting gases were Ar and $Cl_2$gases, and various $Ar/C1_2$flow ratios were used. The etching experiments were carried out at various RF powers such as 700, 700, 500W and at various DC powers such as 200, 150, 100, 50W, respectively. The maximum etch rate of $SrBi_2Ta_2O_9$/Si thin films was 1050 A/min at the $Ar/C1_2$ gas ratio of 20/16, RF power of 700 W and DC power of 200 W. From the SEM (scanning electron microscopy) image of the SBT thin films, the wall angle was as good as about $82^{\circ}$.

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BST Thin Film Multi-Layer Capacitors

  • Choi, Woo Sung;Kang, Min-Gyu;Ju, Byeong-Kwon;Yoon, Seok-Jin;Kang, Chong-Yun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.319-319
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    • 2013
  • Even though the fabrication methods of metal oxide based thin film capacitor have been well established such as RF sputtering, Sol-gel, metal organic chemical vapor deposition (MOCVD), ion beam assisted deposition (IBAD) and pulsed laser deposition (PLD), an applicable capacitor of printed circuit board (PCB) has not realized yet by these methods. Barium Strontium Titanate (BST) and other high-k ceramic oxides are important materials used in integrated passive devices, multi-chip modules (MCM), high-density interconnect, and chip-scale packaging. Thin film multi-layer technology is strongly demanded for having high capacitance (120 nF/$mm^2$). In this study, we suggest novel multi-layer thin film capacitor design and fabrication technology utilized by plasma assisted deposition and photolithography processes. Ba0.6Sr0.4TiO3 (BST) was used for the dielectric material since it has high dielectric constant and low dielectric loss. 5-layered BST and Pt thin films with multi-layer sandwich structures were formed on Pt/Ti/$SiO_2$/Si substrate by RF-magnetron sputtering and DC-sputtering. Pt electrodes and BST layers were patterned to reveal internal electrodes by photolithography. SiO2 passivation layer was deposited by plasma-enhanced chemical vapor deposition (PE-CVD). The passivation layer plays an important role to prevent short connection between the electrodes. It was patterned to create holes for the connection between internal electrodes and external electrodes by reactive-ion etching (RIE). External contact pads were formed by Pt electrodes. The microstructure and dielectric characteristics of the capacitors were investigated by scanning electron microscopy (SEM) and impedance analyzer, respectively. In conclusion, the 0402 sized thin film multi-layer capacitors have been demonstrated, which have capacitance of 10 nF. They are expected to be used for decoupling purpose and have been fabricated with high yield.

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Preparation of the SiO2 Films with Low-Dit by Low Temperature Oxidation Process (저온 산화공정에 의해 낮은 Dit를 갖는 실리콘 산화막의 제조)

  • Jeon, Bup-Ju;Jung, Il-Hyun
    • Applied Chemistry for Engineering
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    • v.9 no.7
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    • pp.990-997
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    • 1998
  • In this work, the $SiO_2$ films on the silicon substrate with different orientations were first prepared by the low temperature process using the ECR plasma diffusion as a function of microwave power and oxidation time. Before and after thermal treatment, the surface morphology, Si/O ratio from physicochemical properties, and the electrical properties of the oxide films were also investigated. The oxidation rate increased with microwave power, while surface morphology showed the nonuniform due to etching. The film quality, therefore, was lowered with increasing the defect by etching and the content of positive oxide ions in the oxide films from bulk by higher self-DC bias. The content of positive oxide ions in the oxide films with different Si orientations showed Si(100) < Si(111) < poly Si. The defects in $Si/SiO_2$ interface of $SiO_2$ film could be decreased by annealing, while $Q_{it}$ and $Q_f$ were independent of thermal treatment and the dependent on concentration of reactive oxide ions and self-DC bias of substrate. At microwave power of 300, and 400 W, the high quality $SiO_2$ film that had lower surface roughness and defect in $Si/SiO_2$ interface was obtained. The value of interface trap density, then, was ${\sim}9{\times}10^{10}cm^{-2}eV^{-1}$.

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Effects on the Oxidation Rate with Silicon Orientation and Its Surface Morphology (실리콘배향에 따른 산화 속도 영향과 표면 Morphology)

  • Jeon, Bup-Ju;Oh, In-Hwan;Um, Tae-Hoon;Jung, Il-Hyun
    • Applied Chemistry for Engineering
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    • v.8 no.3
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    • pp.395-402
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    • 1997
  • The $SiO_2$ films were prepared by ECR(electron cyclotron resonance) plasma diffusion method, Deal-Grove model and Wolters-Zegers-van Duynhoven model were used to estimate the oxidation rate which was correlated with surface morphology for different orientation of Si(100) and Si(111). It was seen the $SiO_2$ thickness increased linearly with initial oxidation time. But oxidation rate slightly decrease with oxidation time. It was also shown that the oxidation process was controlled by the diffusion of the reactive species through the oxide layer rather than by the reaction rate at the oxide interface. The similar time dependency has been observed for thermal and plasma oxidation of silicon. From D-G model and W-Z model, the oxidation rate of Si(111) was 1.13 times greater than Si(100) because Si(111) had higher diffusion and reaction rate, these models more closely fits the experimental data. The $SiO_2$ surface roughness was found to be uniform at experimental conditions without etching although oxidation rate was increased, and to be nonuniform due to etching at experimental condition with higher microwave power and closer substrate distance.

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Investigation of Structural and Optical Properties of III-Nitride LED grown on Patterned Substrate by MOCVD (Patterned substrate을 이용하여 MOCVD법으로 성장된 고효율 질화물 반도체의 광특성 및 구조 분석)

  • Kim, Sun-Woon;Kim, Je-Won
    • Korean Journal of Materials Research
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    • v.15 no.10
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    • pp.626-631
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    • 2005
  • GaN-related compound semiconductors were grown on the corrugated interface substrate using a metalorganic chemical vapor deposition system to increase the optical power of white LEDs. The patterning of substrate for enhancing the extraction efficiency was processed using an inductively coupled plasma reactive ion etching system and the surface morphology of the etched sapphire wafer and that of the non-etched surface were investigated using an atomic force microscope. The structural and optical properties of GaN grown on the corrugated interface substrate were characterized by a high-resolution x-ray diffraction, transmission electron microscopy, atomic force microscope and photoluminescence. The roughness of the etched sapphire wafer was higher than that of the non-etched one. The surface of III-nitride films grown on the hemispherically patterned wafer showed the nano-sized pin-holes that were not grown partially. In this case, the leakage current of the LED chip at the reverse bias was abruptly increased. The reason is that the hemispherically patterned region doesn't have (0001) plane that is favor for GaN growth. The lateral growth of the GaN layer grown on (0001) plane located in between the patterns was enhanced by raising the growth temperature ana lowering the reactor pressure resulting in the smooth surface over the patterned region. The crystal quality of GaN on the patterned substrate was also similar with that of GaN on the conventional substrate and no defect was detected in the interface. The optical power of the LED on the patterned substrate was $14\%$ higher than that on the conventional substrate due to the increased extraction efficiency.

Electromagnetic Micro x-y Stage for Probe-Based Data Storage

  • Park, Jae-joon;Park, Hongsik;Kim, Kyu-Yong;Jeon, Jong-Up
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.1 no.1
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    • pp.84-93
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    • 2001
  • An electromagnetic micro x-y stage for probe-based data storage (PDS) has been fabricated. The x-y stage consists of a silicon body inside which planar copper coils are embedded, a glass substrate bonded to the silicon body, and eight permanent magnets. The dimensions of flexures and copper coils were determined to yield $100{\;}\mu\textrm{m}$ in x and y directions under 50 mA of supplied current and to have 440 Hz of natural frequency. For the application to PDS devices, electromagnetic stage should have flat top surface for the prevention of its interference with multi-probe array, and have coils with low resistance for low power consumption. In order to satisfy these design criteria, conducting planar copper coils have been electroplated within silicon trenches which have high aspect ratio ($5{\;}\mu\textrm{m}$in width and $30{\;}\mu\textrm{m}$in depth). Silicon flexures with a height of $250{\;}\mu\textrm{m}$ were fabricated by using inductively coupled plasma reactive ion etching (ICP-RIE). The characteristics of a fabricated electromagnetic stage were measured by using laser doppler vibrometer (LDV) and dynamic signal analyzer (DSA). The DC gain was $0.16{\;}\mu\textrm{m}/mA$ and the maximum displacement was $42{\;}\mu\textrm{m}$ at a current of 180 mA. The measured natural frequency of the lowest mode was 325 Hz. Compared with the designed values, the lower natural frequency and DC gain of the fabricated device are due to the reverse-tapered ICP-RIE process and the incomplete assembly of the upper-sided permanent magnets for LDV measurements.

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Fabrication of Scattering Layer for Light Extraction Efficiency of OLEDs (RIE 공정을 이용한 유기발광다이오드의 광 산란층 제작)

  • Bae, Eun Jeong;Jang, Eun Bi;Choi, Geun Su;Seo, Ga Eun;Jang, Seung Mi;Park, Young Wook
    • Journal of the Semiconductor & Display Technology
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    • v.21 no.1
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    • pp.95-102
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    • 2022
  • Since the organic light-emitting diodes (OLEDs) have been widely investigated as next-generation displays, it has been successfully commercialized as a flexible and rollable display. However, there is still wide room and demand to improve the device characteristics such as power efficiency and lifetime. To solve this issue, there has been a wide research effort, and among them, the internal and the external light extraction techniques have been attracted in this research field by its fascinating characteristic of material independence. In this study, a micro-nano composite structured external light extraction layer was demonstrated. A reactive ion etching (RIE) process was performed on the surfaces of hexagonally packed hemisphere micro-lens array (MLA) and randomly distributed sphere diffusing films to form micro-nano composite structures. Random nanostructures of different sizes were fabricated by controlling the processing time of the O2 / CHF3 plasma. The fabricated device using a micro-nano composite external light extraction layer showed 1.38X improved external quantum efficiency compared to the reference device. The results prove that the external light extraction efficiency is improved by applying the micro-nano composite structure on conventional MLA fabricated through a simple process.