• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.5
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• pp.237-241
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• 2004

Amorphous silicon (a-Si) films are used in a broad range of solar cell, flat panel display, and sensor. Because of the greater ease of deposition and lower processing temperature, thin films are widely used for thin film transistors (TFTs). However, they have lower stability under the exposure of visible light and because of their low field effect mobility ($\mu$$_{FE}$ ) , less than 1 c $m^2$/Vs, they require a driving IC in the external circuits. On the other hand, polycrystalline silicon (poly-Si) thin films have superiority in $\mu$$_{FE}$ and optical stability in comparison to a-Si film. Many researches have been done to obtain high performance poly-Si because conventional methods such as excimer laser annealing, solid phase crystallization and metal induced crystallization have several difficulties to crystallize. In this paper, a new crystallization process using a molybdenum substrate has been proposed. As we use a flexible substrate, high temperature treatment and roll-to-roll process are possible. We have used a high temperature process above 75$0^{\circ}C$ to obtain poly-Si films on molybdenum substrates by a rapid thermal annealing (RTA) of the amorphous silicon (a-Si) layers. The properties of high temperature crystallized poly-Si studied, and poly-Si has been used for the fabrication of TFT. By this method, we are able to achieve high crystal volume fraction as well as high field effect mobility.

• Current Photovoltaic Research
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• v.3 no.4
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• pp.135-139
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• 2015

$Cu_2SnS_3$ (CTS) based thin film solar cells (TFSCs) are of great interest because of its earth abundant, low-toxic and eco-friendly material with high optical absorption coefficient of $10^4cm^{-1}$. In this study, the DC sputtered precursor thin films have been sulfurized using rapid thermal annealing (RTA) system in the graphite box under Ar gas atmosphere for 10 minute. The systematic variation of sulfur powder during annealing process has been carried out and their effects on the structural, morphological and optical properties of CTS thin films have been investigated. The preliminary power conversion efficiency of 1.47% with a short circuit current density of $33.9mA/cm^2$, an open circuit voltage of 159.7 mV, and a fill factor of 27% were obtained for CTS thin film annealed with 0.05g of S powder, although the processing parameter s have not yet been optimized.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.171-171
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• 2010

GaN 기반 Light emitting diodes(LEDs)의 p-type doping layer는 일반적으로 hole을 발생시키는 acceptor로 Mg이 사용하되고 있다. 보통 Mg이 도핑된 p-type GaN은 >$1\;{\Omega}{\cdot}cm$의 저항이 존재하는데 그 이유는 Mg의 열적 이온화를 위한 activation 에너지가 높아서 상온에서 valence band의 hole concentration는 전체 억셉터 농도의 1%가 되지 않기 ��문이다. 본 논문에서는 높은 hole 농도를 얻기 위해서 metalorganic chemical-vapor deposition (MOCVD)를 장비를 사용하여 사파이어 기판의 misorientation-angle에 따른 p-type a-plane(11-20) GaN 특성을 분석하였다. misorientation-angle은 c축 방향으로 $+0.15^{\circ}$, $-0.15^{\circ}$, $-0.2^{\circ}$, $-0.4^{\circ}$ off된 r-plane(1-102) 사파이어 기판 을 사용하였다. p-type 도핑물질로 bis-magnesium (Cp2Mg) 소스를 사용하였고 성장 과정중 발생하는 hydrogen passivation으로 인한 Mg-H complexes현상을 해결하기위해 conventional furnace annealing (CFA)와 rapid thermal annealing (RTA)를 이용하여 열처리 공정을 진행하였다. 열처리 공정은 Air와 N2 분위기에서 $650^{\circ}C$에서 $900^{\circ}C$ 사이의 다양한 온도에서 수행하였고 Hall 측정을 위해 Ni을 전극 물질로 사용하였다. 상온에서 Accent HL5500IU Hall system을 사용하여 hole concentration, mobility, specific resistance을 측정하였다. 열처리 공정 후 Hall측정 결과 $+0.15^{\circ}$, $-0.15^{\circ}$, $-0.2^{\circ}$, $-0.4^{\circ}$ off된 각 샘플들은 온도, 시간, 분위기에 따라 hole concentration ($7.4{\times}10^{16}cm^{-3}{\sim}6{\times}10^{17}cm^{-3}$), mobility(${\mu}h=\;1.72\;cm^2/V-s\;{\sim}15.2\;cm^2/V-s$), specific resistance(4.971 ohm-cm ~8.924 ohm-cm) 가 변화됨을 확인 할 수 있었다. 또한 광학적 특성을 분석하기 위해 Photoluminescence (PL)을 측정하였다.

• Korean Journal of Materials Research
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• v.8 no.12
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• pp.1170-1175
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• 1998

PZT films without lower electrode were deposited on the highly doped Si(100) substrate with MgO buffer layer (Mgo/si) by RF magnetron sputtering method followed by the rapid thermal annealing at $650^{\circ}C$ . We investigated the dependences of the crystalline and electrical properties on the MgO thickness and the RTA post annealing. The PZT films on bare Si (without MgO) showed pyrochlore crystal structure while those on MgO(50 )/Si substrates showed the typical perovskite crystal structures. From SEM and AES analysis, the thickness of PZT films was about 7000 showing relatively smooth interface. The depth profiles indicated that atomic species were distributed homogeneously in the PZT/MgO/Si substrate. The dielectric constant($\varepsilon_{r}$ ) and remanent polarization(2Pr) were about 300 and $14\mu$C/$\textrm{cm}^2$;, respectively. The leakage current was about $3.2\mu$/A$\textrm{cm}^2$.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.189-189
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• 2010

ZnO nanorods 구조는 광소자 및 태양광 소자의 성능을 향상시키기 위해서 무반사계수, 광추출효율, 전기적, 열적 전도도를 개선시킬 수 있어, 매우 큰 관심을 가지고 왔다. 또한 Ag 나노입자는 표면 플라즈몬 효과를 이용하여 LED나 태양전지에 응용하여 소자의 성능이 향상됨을 이론적, 실험적으로 증명되어 왔으며, 현재에도 활발한 연구가 진행되고 있다. 이러한 ZnO nanorods 특성과 Ag 나노입자의 표면 플라즈몬 효과를 이용하기 위해서, 본 연구에서는 Ag 나노 입자를 형성된 ZnO seed층에 ZnO nanorods를 성장시켰다. 시료를 제작을 위해서 비교적 성장이 간단하고 저온성장이 가능한 화학적 합성방법을 이용하였다. Ag 나노입자가 형성된 ZnO seed층 제작을 위해서 먼저 Si 기판위에 RF magnetron 스퍼터를 이용하여 고진공, $N_2$ 분위기에서 일정한 두께로 증착을 하였으며, 이후 Ag 박막을 thermal evaporator로 10 nm 두께로 증착하였다. 그 다음, 크기가 다른 Ag 나노입자를 형성을 위해서 rapid thermal annealing (RTA)을 여러 가지 온도에서 수행하였다. 그리고 이러한 시료들를 이용하여, ZnO nanorods를 성장하기 위하여, $90-95^{\circ}$의 온도에서 zinc nitrate $Zn(NO_3)_2{\cdot}6H_2O$과 hexamethylentetramines (HMT)으로 혼합된 용액에 담가두어 ZnO nanorods를 성장시켰다. Ag 나노입자의 크기에 따라 ZnO nanorods의 구조와 형태에 대하여 어떠한 영향을 주는지를 관찰하기 위해 field emission scanning electron microscopy (FE-SEM)을 이용하여 측정하였으며, Ag와 ZnO의 성분분석과 결정성을 조사하기 위해 X-ray diffraction (XRD)을 이용하여 분석하였다. 그리고 표면 플라즈몬에 의한 영향에 대하여 조사하기 위해, ZnO nanorods와 Ag 나노입자가 형성된 ZnO nanorods를 UV-Vis-NIR spectrophotometer을 이용하여 흡수계수와 반사계수를 비교하여 측정하였으며. 태양전지의 성능향상을 수 있음을 이론적으로 계산하였다. 그리고 또한 photoluminescence (PL) 분석을 수행하여 ZnO nanorods의 구조에 대하여 Ag 나노입자의 영향에 대한 광특성을 측정하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.18-23
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• 2009

The effect of hydrogen-nitrogen annealing on the interface trap properties of Metal-Oxide-Nitride-Oxide-Silicon (MONOS) capacitors is investigated by analyzing the capacitors' gate leakage current and the interface trap density between the Si and $SiO_2$ layer. MONOS samples annealed at $850^{\circ}C$ for 30 s by rapid thermal annealing (RTA) are treated by additional annealing in a furnace, using annealing eases $N_2$ and 2% hydrogen and 98% nitrogen gas mixture $(N_2-H_2)$ at $450^{\circ}C$ for 30 mins. Among the three samples as-deposited, annealed in $N_2$ and $N_2-H_2$, MONOS sample annealed in an $N_2-H_2$ environment is found to have the lowest increase of interface-trap density from the capacitance-voltage experiments. The leakage current of sample annealed in $N_2-H_2$ is also lower than that of sample annealed in $N_2$.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.139-139
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• 2010

금속 실리사이드 나노입자는 열적 및 화학적 안정성이 뛰어나고, 절연막내에 일함수 차이에 따라 깊은 양자 우물구조가 형성되어 비휘발성 메모리 소자를 제작할 수 있다. 그러나 단일 $SiO_2$ 절연막을 사용하였을 경우 저장된 전하의 정보 저장능력 및 쓰기/지우기 시간을 향상시키는 데 물리적 두께에 따른 제한이 따른다. 본 연구에서는 터널장벽 엔지니어링을 통하여 물리적인 두께는 단일 $SiO_2$ 보다는 두꺼우나 쓰기/지우기 동작을 위하여 인가되는 전기장에 의하여 상대적으로 전자가 느끼는 상대적인 터널 절연막 두께를 감소시키는 방법으로 동작속도를 향상 시킨 $SiO_2/Si_3N_4/SiO_2$ 및 $Si_3N_4/SiO_2/Si_3N_4$ 터널 절연막을 사용한 금속 실리사이드 나노입자 비휘발성 메모리를 제조하였다. 제조방법은 우선 p-type 실리콘 웨이퍼 위에 100 nm 두께로 증착된 Poly-Si 층을 형성 한 이후 소스와 드레인 영역을 리소그래피 방법으로 형성시켜 트랜지스터의 채널을 형성한 이후 그 상부에 $SiO_2/Si_3N_4/SiO_2$ (2 nm/ 2 nm/ 3 nm) 및 $Si_3N_4/SiO_2/Si_3N_4$ (2 nm/ 3 nm/ 3 nm)를 화학적 증기 증착(chemical vapor deposition)방법으로 형성 시킨 이후, direct current magnetron sputtering 방법을 이용하여 2~5 nm 두께의 $WSi_2$ 및 $TiSi_2$ 박막을 증착하였으며, 나노입자 형성을 위하여 rapid thermal annealing(RTA) system을 이용하여 $800{\sim}1000^{\circ}C$에서 질소($N_2$) 분위기로 1~5분 동안 열처리를 하였다. 이후 radio frequency magnetron sputtering을 이용하여 $SiO_2$ control oxide layer를 30 nm로 증착한 후, RTA system을 이용하여 $900^{\circ}C$에서 30초 동안 $N_2$ 분위기에서 후 열처리를 하였다. 마지막으로 thermal evaporator system을 이용하여 Al 전극을 200 nm 증착한 이후 리소그래피와 식각 공정을 통하여 채널 폭/길이 $2{\sim}5{\mu}m$인 비휘발성 메모리 소자를 제작하였다. 제작된 비휘발성 메모리 소자는 HP 4156A semiconductor parameter analyzer와 Agilent 81101A pulse generator를 이용하여 전기적 특성을 확인 하였으며, 측정 온도를 $25^{\circ}C$, $85^{\circ}C$, $125^{\circ}C$로 변화시켜가며 제작된 비휘발성 메모리 소자의 열적 안정성에 관하여 연구하였다.

• Current Photovoltaic Research
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• v.4 no.1
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• pp.16-20
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• 2016

$Cu_2ZnSnS_4$ (CZTS) thin films were fabricated by successive electrodeposition of layers of precursor elements followed by sulfurization of an electrodeposited Cu-Zn-Sn precursor. In order to improve quality of the CZTS films, we tried to optimize the deposition condition of absorber layers. In particular, I have conducted optimization experiments by changing the Cu-layer deposition time. The CZTS absorber layers were synthesized by different Cu-layer conditions ranging from 10 to 16 minutes. The sulfurization of Cu/Sn/Zn stacked metallic precursor thin films has been conducted in a graphite box using rapid thermal annealing (RTA). The structural, morphological, compositional, and optical properties of CZTS thin films were investigated using X-ray diffraction (XRD), Field emission scanning electron microscopy (FE-SEM), Raman spectroscopy, and X-ray Flourescenece Spectrometry (XRF). Especially, the CZTS TFSCs exhibits the best power conversion efficiency of 4.62% with $V_{oc}$ of 570 mV, $J_{sc}$ of $18.15mA/cm^2$ and FF of 45%. As the time of deposition of the Cu-layer to increasing, the properties were confirmed to be systematically changed. And we have been discussed in detail below.

• Korean Journal of Materials Research
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• v.19 no.2
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• pp.90-94
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• 2009

The development of low-k materials is essential for modern semiconductor processes to reduce the cross-talk, signal delay and capacitance between multiple layers. The effect of the $CH_4$ concentration on the formation of SiOC(-H) films and their dielectric characteristics were investigated. SiOC(-H) thin films were deposited on Si(100)/$SiO_2$/Ti/Pt substrates by plasma-enhanced chemical vapor deposition (PECVD) with $SiH_4$, $CO_2$ and $CH_4$ gas mixtures. After the deposition, the SiOC(-H) thin films were annealed in an Ar atmosphere using rapid thermal annealing (RTA) for 30min. The electrical properties of the SiOC(-H) films were then measured using an impedance analyzer. The dielectric constant decreased as the $CH_4$ concentration of low-k SiOC(-H) thin film increased. The decrease in the dielectric constant was explained in terms of the decrease of the ionic polarization due to the increase of the relative carbon content. The spectrum via Fourier transform infrared (FT-IR) spectroscopy showed a variety of bonding configurations, including Si-O-Si, H-Si-O, Si-$(CH_3)_2$, Si-$CH_3$ and $CH_x$ in the absorbance mode over the range from 650 to $4000\;cm^{-1}$. The results showed that dielectric properties with different $CH_4$ concentrations are closely related to the (Si-$CH_3$)/[(Si-$CH_3$)+(Si-O)] ratio.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.140-140
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• 2009

The Metal-ferroelectric-semiconductor (MFS) structure has superior advantages such as high density integration and non-destructive read-out operation. However, to obtain the desired electrical characteristics of an MFS structure is difficult because of interfacial reactions between ferroelectric thin film and Si substrate. As an alternative solution, the MFS structure with buffer insulating layer, i.e. metal-ferroelectric-insulator-semiconductor (MFIS), has been proposed to improve the interfacial properties. Insulators investigated as a buffer insulator in a MFIS structure, include $Ta_2O_5$, $HfO_2$, and $ZrO_2$ which are mainly high-k dielectrics. In this study, we prepared the Dy-doped $La_2O_3$ solution buffer layer as an insulator. To form a Dy-doped $La_2O_3$ buffer layer, the solution was spin-coated on p-type Si(100) wafer. The coated Dy-doped $La_2O_3$ films were annealed at various temperatures by rapid thermal annealing (RTA). To evaluate electrical properties, Au electrodes were thermally evaporated onto the surface of the samples. Finally, we observed the surface morphology and crystallization quality of the Dy-doped $La_2O_3$ on Si using atomic force microscopy (AFM) and x-ray diffractometer (XRD), respectively. To evaluate electrical properties, the capacitance-voltage (C-V) and current density-voltage (J-V) characteristics of Au/Dy-doped La2O3/Si structure were measured.