Browse > Article

Interface Traps Analysis as Bonding of The Silicon/Nitrogen/Hydrogen in MONOS Capacitors  

Kim, Hee-Dong (School of Electrical Engineering, Korea University)
An, Ho-Myoung (School of Electrical Engineering, Korea University)
Seo, Yu-Jeong (School of Electrical Engineering, Korea University)
Zhang, Yong-Jie (School of Electrical Engineering, Korea University)
Nam, Ki-Hyun (Department of Electronic Materials Engineering, Kwangwoon University)
Chung, Hong-Bay (Department of Electronic Materials Engineering, Kwangwoon University)
Kim, Tae-Geun (School of Electrical Engineering, Korea University)
Publication Information
Abstract
The effect of hydrogen-nitrogen annealing on the interface trap properties of Metal-Oxide-Nitride-Oxide-Silicon (MONOS) capacitors is investigated by analyzing the capacitors' gate leakage current and the interface trap density between the Si and $SiO_2$ layer. MONOS samples annealed at $850^{\circ}C$ for 30 s by rapid thermal annealing (RTA) are treated by additional annealing in a furnace, using annealing eases $N_2$ and 2% hydrogen and 98% nitrogen gas mixture $(N_2-H_2)$ at $450^{\circ}C$ for 30 mins. Among the three samples as-deposited, annealed in $N_2$ and $N_2-H_2$, MONOS sample annealed in an $N_2-H_2$ environment is found to have the lowest increase of interface-trap density from the capacitance-voltage experiments. The leakage current of sample annealed in $N_2-H_2$ is also lower than that of sample annealed in $N_2$.
Keywords
MONOS; hydrogen-nitrogen annealing; radical-blocking oxide; NBTI/PBTI;
Citations & Related Records
연도 인용수 순위
  • Reference
1 M. W. Seo, D. W. Kwak, W. S. Cho, C. J. Park, W. S. Kim, H. Y. Cho, "Charge traps and interface traps in non-volatile memory device with Oxide-Nitride-Oxide structures", Solid-State Electronics, Vol. 517, pp. 245-247, August 2008
2 K. Sekine, Y. Saito, M. Hirayama, and T. Ohmi, "Highly reliable ultrathin silicon oxide film formation at low temperature by oxygen radical generated in high-density krypton plasma" IEEE Trans. Electron Dev. Vol. 48, pp. 1550-1555, August 2001   DOI   ScienceOn
3 S. Zhu, A. Nakajima, T. Ohashi, H. Miyake, "Influence of bulk bias on negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics", J. Appl. Phys. Vol. 99, pp. 064510-7, March 2006   DOI   ScienceOn
4 Y. J. Seo, K. C. Kim, H. D. Kim, M. S. Joo, H. M. An, and T. G. Kim, "Correlation between charge trap distribution and memory characteristics in metal/oxide/nitride/ oxide/silicon devices with two different blocking oxides, A12O3 and SiO2", Appl. Phys. Lett. Vol. 93, pp. 063508-3, August 2008   DOI   ScienceOn
5 J. Bu, M. H. White, "Design considerations in scaled SONOS nonvolatile memory devices", Sol. Stat. Electron. Vol. 45, pp. 113-120, January 2001   DOI   ScienceOn
6 Y. J. Song, B. Mheen, J. Y. Kang, Y. S. Lee, N. E. Lee, J. H. Kim, J. I. Song, and K. H. Shim, "A low-temperature and high-Quality radical-assisted oxidation process utilizing a remote ultraviolet ozone source for high-performance SiGe/Si MOSFETs", Semicond. Sci. Technol. Vol. 19, pp. 792-797, May 2004   DOI   ScienceOn
7 Z. Yin and F. W. Smith, "Free-energy model for bonding in amorphous covalent alloys", Phys. Rev. B, Vol. 43, pp. 4507-4510, February 1991   DOI   ScienceOn
8 A. Nayfeh, C. O. Chui, K. C. Saraswat, and T. Yonehara, "Effects of hydrogen annealing on heteroepitaxial-Ge layers on Si: Surface roughness and electrical quality", Appl. Phys. Lett. Vol. 93, pp. 2815-2817, October 2008
9 G. Wang, M. H. White, 'Characterization of scaled MANOS nonvolatile semiconductor memory (NVSM) devices', Solid-State Electronics, Vol. 52, pp. 1491-1497, August 2008   DOI   ScienceOn
10 Y. J. Seo, K. C. Kim, Y. M. Sung, H. Y. Cho, M. S. Joo, S. H. Pyi, and T. G. Kim, "Analysis of electronic memory traps in the oxide-nitride-oxide structure of a polysilicon-oxide-nitride-oxide-semiconductor flash memory", Appl. Phys. Lett. Vol. 92, pp. 132104-3, March 2008   DOI   ScienceOn
11 J. G. Yun, Y. Kim, I. H. Park, J. H. Lee, S. Kang, D. H. Lee, S. Cho, D. H. Kim, G. S. Lee, W. B. Sim, Y. Son, H. Shin, J. D. Lee, B. G. Park, "Fabrication and characterization of fin SONOS flash memory with separated double-gate structure", Solid-State Electronics, Vol. 52, pp. 1498-1504, August 2008   DOI   ScienceOn
12 H. M. An. H. D. Kim, K. C. Kim, Y. J. Seo, Y. Zhang T. G. Kim, "Improved electrical and reliability characteristics in metal/oxide/nitride/ oxide/ silicon capacitors with blocking oxide layers formed under the radical oxidation process" Journal of Nanoscience and Nanotechnology, 2009 (in press)
13 J. H. Yi, H. C. Shin, Y. J. Park, H. S. Min, "Polarity-Dependent Device Degradation in SONOS Transistors Due to Gate Conduction Under Nonvolatile Memory Operations", IEEE Trans. Dev. Mater. Reliab. Vol. 6, pp. 334-342, June 2006   DOI   ScienceOn
14 H. D. Kim, H. M. An, K. C. Kim, Y. J. Seo, Y. Zhang T. G. Kim, "Hydrogen Passivation Effects under Negative Bias Temperature Instability Stress in MetaVSilicon -Oxide/Silicon - Nitride/Silicon-Oxide/Silicon Capacitors for Flash Memories", Microelectronics Reliability, 2009 (in press)
15 T. Hamada, Y. Saito, M. Hirayama, H. Aharoni, and T. Ohmi, "Trap Characterization in Buried-Gate N-Channel 6H-SiC JFETs" IEEE Electron Dev. Lett. Vol. 22, pp. 423-425, September 2001   DOI   ScienceOn
16 S. H. Seo, G. C. Kang et al, "Dynamic bias temperature instability-like behaviors under Fowler-Nordheim program/erase stress in nanoscale silicon-oxide-nitride-oxide-silicon memories", Appl. Phys. Lett. Vol. 92, pp. 133508-3, April 2008   DOI   ScienceOn