• Bulletin of the Korean Mathematical Society
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• v.47 no.6
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• pp.1251-1258
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• 2010

For an M/G/1 processor-sharing queue with batch arrivals, Avrachenkov et al. [1] conjectured that the conditional mean sojourn time is concave. However, Kim and Kim [5] showed that this conjecture is not true in general. In this paper, we show that this conjecture is true if the service times have a hyperexponential distribution.

• Journal of applied mathematics & informatics
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• v.42 no.2
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• pp.291-303
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• 2024

In this paper, we consider a feedforward network of overloaded multiclass processor sharing queues and we give a fluid model solution under the condition that the system is initially empty. The main theorem of the paper provides sufficient conditions for a fluid model solution to be linear with time. The results are illustrated through examples.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1221-1224
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• 2003

A 64-point R2$^2$ SDF pipeline FFT processor using a new efficient computation sharing multiplier was designed. Computation sharing multiplication specifically targets computation re-use in multiplication of coefficient vector by scalar and is effectively used in DSP(Digital Signal Processing). To reduce the number of multipliers in FFT, we used the proposed computation sharing multiplier. The 64-point pipeline FFT processor was implemented by VHDL and synthesized using Max+PLUSII of Altera. The simulation result shows that the proposed computation sharing multiplier can be reduced to about 17.8% logic cells compared with a conventional multiplier. This processor can operate at 33MHz and calculate a 64-point pipeline FFT in 1.94 $mutextrm{s}$.

• The KIPS Transactions:PartA
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• v.10A no.4
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• pp.347-356
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• 2003

The OCT algorithm needs efficient hardware architecture to compute inner product. The conventional methods have large hardware complexity. Because of this reason. a computation sharing multiplier was proposed for implementing inner product. However, the existing multiplier has inefficient hardware architecture in precomputer and select units. Therefore it degrades the performance of the multiplier. In this paper, we proposed a new efficient computation sharing multiplier and applied it to implementation of 1-D DCT processor. The comparison results show that the new multiplier is more efficient than an old one when hardware architectures and logic synthesis results were compared. The designed 1-D DCT processor by using the proposed multiplier is more high performance than typical design methods.

• Journal of applied mathematics & informatics
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• v.15 no.1_2
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• pp.511-525
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• 2004

we model communication and computer systems that process interactive and several and several types of background jobs. The scheduling policy in use is to share the processor among all interactive jobs and, at most, one background job of each type at a time according to the process sharing discipline. Background jobs of each type are served on a first-come-first-served basis. Such scheduling policy is called Processor Sharing with Background jobs (PSBJ). In fact, the PSBJ policy is commonly used on many communication and computer systems that allow interactive usage of the systems and process certain jobs in a background mode. In this paper, the stability conditions for the PSBJ policy are given and proved. Since an exact analysis of the policy seems to be very difficult, an approximate analytic model is proposed to obtain the average job sojourn times. The model requires the solution of a set of nonlinear equations, for which an iterative algorithm is given and its convergence is proved. Our results reveal that the model provides excellent estimates of average sojourn times for both interactive and background jobs with a few percent of errors in most of the cases considered.

• The Korean Journal of Applied Statistics
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• v.22 no.3
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• pp.541-551
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• 2009

Generalized processor sharing(GPS) service policy is a scheduling algorithm to allocate the bandwidth of a queueing system with multi-class input traffic. In a queueing system with single-class traffic, the stationary queue length becomes larger stochastically when the bandwidth (i.e. the service rate) of the system decreases. For a given GPS server, we consider the similar problem to this. We define the monotonicity for the head of the line processor sharing(HLPS) servers in which the units in the heads of the queues are served simultaneously and the bandwidth allocated to each queue are determined by the numbers of units in the queues. GPS is a type of monotonic HLPS. We obtain the HLPS server whose queue length of a class stochastically bounds upper that of corresponding class in the given monotonic HLPS server for all classes. The queue lengths process of all classes in the obtained HLPS server has the stationary distribution of product form. When the given monotonic HLPS server is GPS server, we obtain the explicit form of the stationary queue lengths distribution of the bounding HLPS server. Numerical result shows how tight the stochastic bound is.

• Proceedings of the Korea Society for Simulation Conference
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• 1994.10a
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• pp.32-32
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• 1994

In this example, a message passing based multicomputer system with general interdonnedtion network is considered. After multicomputer systems are developed with morm-hole routing network, topologies of interconecting network are not major considertion for process management and resource sharing. Tehre is an independeent operating system kernel oneach node. It communicates with other kernels using message passingmechanism. Based on this architecture, the problem is how mech does performance degradation will occur in the case of processor sharing on multicomputer systems. Processor sharing between application programs is veryimprotant decision on system performance. In almost cases, application programs running on massively parallel computer systems are not so much user-interactive. Thus, the main performance index is system throughput. Each application program has various communication patterns. and the sharing of processors causes serious performance degradation in hte worst case such that one processor is shared by two processes and another processes are waiting the messages from those processes. As a result, considering this problem is improtant since it gives the reason whether the system allows processor sharingor not. Input data has many parameters in this simulation . It contains the number of threads per task , communication patterns between threads, data generation and also defects in random inupt data. Many parallel aplication programs has its specific communication patterns, and there are computation and communication phases. Therefore, this phase informatin cannot be obtained random input data. If we get trace data from some real applications. we can simulate the problem more realistic . On the other hand, simualtion results will be waseteful unless sufficient trace data with varisous communication patterns is gathered. In this project , random input data are used for simulation . Only controllable data are the number of threads of each task and mapping strategy. First, each task runs independently. After that , each task shres one and more processors with other tasks. As more processors are shared , there will be performance degradation . Form this degradation rate , we can know the overhead of processor sharing . Process scheduling policy can affects the results of simulation . For process scheduling, priority queue and FIFO queue are implemented to support round-robin scheduling and priority scheduling.

• Communications of the Korean Institute of Information Scientists and Engineers
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• v.5 no.1
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• pp.04-10
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• 1987

We consider a time sharing computer system with a single processor where tasks ofK different types arrive at the system according to independent time homogeneous Poisson processes from outside. A task, after given a quantum for processing, leaves the system, or changes the type and rejoins the system according to specified probabilitycs. While many existing priority time sharing models determine the priorities of tasks strictly by their service time requirements, this paper develops a new scheduling rule wherein the importances or urgencies in addition to the service time requirements of tasks are counted, by inposing an appropriate reward structure on the system. Also presented is the algorithm through which to determine the rankings of K types according to this new scheduling rule.

• ETRI Journal
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• v.32 no.1
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• pp.1-10
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• 2010

In this paper, we present a fast Fourier transform (FFT) processor with four parallel data paths for multiband orthogonal frequency-division multiplexing ultra-wideband systems. The proposed 128-point FFT processor employs both a modified radix-$2^4$ algorithm and a radix-$2^3$ algorithm to significantly reduce the numbers of complex constant multipliers and complex booth multipliers. It also employs substructure-sharing multiplication units instead of constant multipliers to efficiently conduct multiplication operations with only addition and shift operations. The proposed FFT processor is implemented and tested using 0.18 ${\mu}m$ CMOS technology with a supply voltage of 1.8 V. The hardware- efficient 128-point FFT processor with four data streams can support a data processing rate of up to 1 Gsample/s while consuming 112 mW. The implementation results show that the proposed 128-point mixed-radix FFT architecture significantly reduces the hardware cost and power consumption in comparison to existing 128-point FFT architectures.

• The Journal of the Korea Contents Association
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• v.5 no.3
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• pp.183-191
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• 2005

In a sender-initiated load sharing algorithms, sender(overloaded processor) continues to send unnecessary request messages for load transfer until receiver(underloaded processor) is found while the system load is heavy. Therefore, it yields many problems such as low CPU utilization and system throughput because of inefficient inter-processor communications until the sender receives an accept message from the receiver in this environment. This paper presents an approach based on genetic algorithm(GA) for dynamic load sharing in heterogeneous distributed systems. In this scheme the processors to which the requests are sent off is determined by the proposed GA to decrease unnecessary request messages.