• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.9
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• pp.657-662
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• 2004

The low-power design of the digital hearing aid is indispensable to achieve the compact portable device with long battery duration. In this paper, new low-power adaptive filter structure is proposed based on distributed arithmetic(DA). By modifying the DA technique, the proposed decimation filter structure can significantly reduce the power consumption and implementation area. Through Verilog-HDL coding, cell occupation of the proposed structure is reduced to 33.49% in comparison with that of the conventional multiplier structure. Since Verilog-HDL simulation processing time of the two structures are same, it is assumed that the power consumption or implementation area is proportional to the cell occupation in the simulation.

• Journal of Information Processing Systems
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• v.16 no.6
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• pp.1343-1358
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• 2020

In the stagewise arithmetic orthogonal matching pursuit algorithm, the weak threshold used in sparsity estimation is determined via maximum iterations. Different maximum iterations correspond to different thresholds and affect the performance of the algorithm. To solve this problem, we propose an improved variable weak threshold based on the stagewise arithmetic orthogonal matching pursuit algorithm. Our proposed algorithm uses the residual error value to control the weak threshold. When the residual value decreases, the threshold value continuously increases, so that the atoms contained in the atomic set are closer to the real sparsity value, making it possible to improve the reconstruction accuracy. In addition, we improved the generalized Jaccard coefficient in order to replace the inner product method that is used in the stagewise arithmetic orthogonal matching pursuit algorithm. Our proposed algorithm uses the covariance to replace the joint expectation for two variables based on the generalized Jaccard coefficient. The improved generalized Jaccard coefficient can be used to generate a more accurate calculation of the correlation between the measurement matrixes. In addition, the residual is more accurate, which can reduce the possibility of selecting the wrong atoms. We demonstrate using simulations that the proposed algorithm produces a better reconstruction result in the reconstruction of a one-dimensional signal and two-dimensional image signal.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.26 no.1
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• pp.5-15
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• 2016

Power analysis attacks are techniques to analyze power signals to find out the secrets when cryptographic algorithm is performed. One of the most famous countermeasure against power analysis attacks is masking methods. Masking types are largely classified into two types which are boolean masking and arithmetic masking. For the cryptographic algorithm to be used with boolean and arithmetic masking at the same time, the converting algorithm can switch between boolean and arithmetic masking. In this paper we propose an algorithm for switching from boolean to arithmetic masking using storage size at less cost than ones. The proposed algorithm is configured to convert using the look-up table without the least significant bit(LSB), because of equal the bit of boolean and arithmetic masking. This makes it possible to design a converting algorithm compared to the previous algorithm at a lower cost without sacrificing performance. In addition, by applying the technique at the LEA it showed up to 26 percent performance improvement over existing techniques.

• Proceedings of the KSRS Conference
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• 2005.10a
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• pp.678-682
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• 2005

IETF suggested AAA for safe and reliable user authentication on various network and protocol caused by development in internet and increase in users. Diameter standard authentication system does not provide mutual authentication and non-repudiation. AAA authentication system using public key was suggested to supplement such Diameter authentication but application in mobile service control nodes is difficult due to overhead of communication and arithmetic. ID based AAA authentication system was suggested to overcome such weak point but it still has the weak point against collusion attack or forgery attack. In this thesis, new ID based AAA authentication system is suggested which is safe against collusion attack and forgery attack and reduces arithmetic quantity of mobile nodes with insufficient arithmetic and power performance. In this thesis, cryptological safety and arithmetical efficiency is tested to test the suggested system through comparison and assessment of current systems. Suggested system uses two random numbers to provide stability at authentication of mobile nodes. Also, in terms of power, it provides the advantage of seamless service by reducing authentication executing time by the performance of server through improving efficiency with reduced arithmetic at nodes.

• Wind and Structures
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• v.19 no.5
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• pp.505-522
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• 2014

While effects of the atmospheric boundary layer flow on engineering infrastructure are more or less known, some local transient winds create difficulties for structures, traffic and human activities. Hence, further research is required to fully elucidate flow characteristics of some of those very unique local winds. In this study, important characteristics of observed vertical velocity profiles along the main wind direction for the gusty Bora wind blowing along the eastern Adriatic coast are presented. Commonly used empirical power-law and the logarithmic-law profiles are compared against unique 3-level high-frequency Bora measurements. The experimental data agree well with the power-law and logarithmic-law approximations. An interesting feature observed is a decrease in the power-law exponent and aerodynamic surface roughness length, and an increase in friction velocity with increasing Bora wind velocity. This indicates an urban-like velocity profile for smaller wind velocities and rural-like velocity profile for larger wind velocities, which is due to a stronger increase in absolute velocity at each of the heights observed as compared to the respective velocity gradient (difference in average velocity among two different heights). The trends observed are similar during both the day and night. The thermal stratification is near neutral due to a strong mechanical mixing. The differences in aerodynamic surface roughness length are negligible for different time averaging periods when using the median. For the friction velocity, the arithmetic mean proved to be independent of the time record length, while for the power-law exponent both the arithmetic mean and the median are not influenced by the time averaging period. Another issue is a large difference in aerodynamic surface roughness length when calculating using the arithmetic mean and the median. This indicates that the more robust median is a more suitable parameter to determine the aerodynamic surface roughness length than the arithmetic mean value. Variations in velocity profiles at the same site during different wind periods are interesting because, in the engineering community, it has been commonly accepted that the aerodynamic characteristics at a particular site remain the same during various wind regimes.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.81-84
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• 2001

In recent years, the design of CMOS VCO at ever-higher frequencies has gained interest. This paper proposes an arithmetic functionality VCO circuit based on a differential ring oscillator for operating in high frequency. The proposed VCO architecture with half adder is able to produce two times higher frequency with my delay cell than conventional VCO produce double oscillation frequency and power dissipation is 14.59mW.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.856-859
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• 2002

This paper proposes a high-performance VLSl architecture using distributed arithmetic for higher-order FIR filters with complex coefficients. For the purpose of realizing high sampling rate with small latency in high-order filters, we apply distributed arithmetic[1］. Moreover, in order to decrease drastically the power dissipation, the structure applying not ROM's but optimum function circuits which we have previously proposed, is utilized［2]［3］. However, this structure increases in the number of adders as compared to the conventional structure applying ROM's. In order to realize a more effective method for further higher-order filter, we propose newly an implementation applying two methods which have large effects on the unit using the adders. First , we propose an implementation applying SFAs(Serial Full Adders) and SFSs(Serial Full Subtractors). Second, we propose a structure applying proposed 4-2 adders. Finally, it is shown that the proposed architecture is an effective way to realize low power dissipation and small latency while the sampling rate is kept constant for further higher-order filters with complex coefficients.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.949-952
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• 2000

A low power 10bit current-mode folding and interpolating CMOS analog to digital converter (ADC) with arithmetic folding blocks is presented in this paper. A current-mode two-level folding amplifier with a high folding rate (FR) is designed not only to prevent ADC from increasing a FR excessively, but also to perform a high resolution at a single power supply of 3.3V The proposed ADC is implemented by a 0.6${\mu}$m n-well CMOS single poly/double metal process. The simulation result shows a differential nonlinearity (DNL) of ${\pm}$0.5LSB, an integral nonlinearity (INL) of ${\pm}$1.0LSB

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.20 no.1
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• pp.101-106
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• 2020

This paper relates with the VS-QE-MMA (Varying Stepsize-Quantized Error-MMA) based on the varying stepsize for improving the equalization performance in the QE-MMA adaptive equalization algorithm that is possible to reducing the intersymbol interference occurred at channel. The SE-MMA use the high-order statistics of transmitted signal and sign of error signal. The QE-MMA was appeared for the H/W implementation easiness substitutes the multiplication and substraction into the shift and substraction in the updating the tap coefficient based on the power-of-two operation of error signal magnitude. The QE-MMA gives degradation of equalization performance due to the such simplification of arithmetic operation. For improving this problem, the propose algorithm, namely VS-QE-MMA, applies the varying stepsize of the nonlinear transformation of error signal. It was confirmed by simulation that the VS-QE-MMA gives better performance than current QE-MMA in the same channel and signal to noise ratio. As a result of simulation, the VS-QE-MMA has more better performance in the every performance index, and it was also confirmed that the varying stepsize effect can be obtained in the greater than 10dB of signal to noise ratio.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.1
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• pp.55-60
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• 2021

This paper relates with the performance evaluation of QE-MMA (Quantized Error-MMA) adaptive equalization algorithm based on the stepsize and quantizer bit number in order to reduce the intersymbol interference due to nonlinear distortion occurred in the time dispersive channel. The QE-MMA was proposed using the power-of-two arithmetic for the H/W implementation easiness substitutes the multiplication and addition into the shift and addition in the tap coefficient updates process that modifies the SE-MMA which use the high-order statistics of transmitted signal and sign of error signal. But it has different adaptive equalization performance by the step size and quantizer bit number for obtain the sign of error in the generation of error signal in QE-MMA, and it was confirmed by computer simulation. As a simulation, it was confirmed that the convergence speed for reaching steady state depend on stepsize and the residual quantities after steady state depend on the quantizer bit number in the QE-MMA adaptive equalization algorithm performance.