• 제목/요약/키워드: power-efficient design

검색결과 1,044건 처리시간 0.023초

Optimal Design for Flexible Passive Biped Walker Based on Chaotic Particle Swarm Optimization

  • Wu, Yao;Yao, Daojin;Xiao, Xiaohui
    • Journal of Electrical Engineering and Technology
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    • 제13권6호
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    • pp.2493-2503
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    • 2018
  • Passive dynamic walking exhibits humanoid and energy efficient gaits. However, optimal design of passive walker at multi-variable level is not well studied yet. This paper presents a Chaotic Particle Swarm Optimization (CPSO) algorithm and applies it to the optimal design of flexible passive walker. Hip torsional stiffness and damping were incorporated into flexible biped walker, to imitate passive elastic mechanisms utilized in human locomotion. Hybrid dynamics were developed to model passive walking, and period-one gait was gained. The parameters global searching scopes were gained after investigating the influences of structural parameters on passive gait. CPSO were utilized to optimize the flexible passive walker. To improve the performance of PSO, multi-scroll Jerk chaotic system was used to generate pseudorandom sequences, and chaotic disturbance would be triggered if the swarm is trapped into local optimum. The effectiveness of CPSO is verified by comparisons with standard PSO and two typical chaotic PSO methods. Numerical simulations show that better fitness value of optimal design could be gained by CPSO presented. The proposed CPSO would be useful to design biped robot prototype.

효율적인 부분 곱 감소를 이용한 고집적·저전력·고속 근사 곱셈기 (Approximate Multiplier with High Density, Low Power and High Speed using Efficient Partial Product Reduction)

  • 서호성;김대익
    • 한국전자통신학회논문지
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    • 제17권4호
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    • pp.671-678
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    • 2022
  • 근사 컴퓨팅은 정확한 결과 대신에 허용 가능한 정도의 부정확한 결과를 도출하는 연산 기법이다. 근사 곱셈은 고성능, 저전력 컴퓨팅을 위한 근사 컴퓨팅 방식 중 하나이다. 본 논문에서는 근사 4-2 compressor와 향상된 전가산기를 사용하여 고집적·저전력·고속 근사 곱셈기를 제안하였다. 근사 4-2 compressor를 사용한 근사 곱셈기는 정확, 근사, 상수 수정 영역의 3개 영역으로 구성되어 있으며, 효율적인 부분 곱 감소 방식을 적용하여 각 영역의 크기를 조절하면서 성능을 비교하였다. 제안한 근사 곱셈기는 Verilog HDL로 설계하였고, 25nm CMOS 공정에서 Synopsys Design Compiler(DC)를 이용하여 면적, 전력, 지연시간을 분석하였으며, 기존의 근사 곱셈기에 비해 면적을 10.47%, 전력을 26.11%, 지연시간을 13% 줄였다.

Power-Efficient Wireless Neural Stimulating System Design for Implantable Medical Devices

  • Lee, Hyung-Min;Ghovanloo, Maysam
    • IEIE Transactions on Smart Processing and Computing
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    • 제4권3호
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    • pp.133-140
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    • 2015
  • Neural stimulating implantable medical devices (IMDs) have been widely used to treat neurological diseases or interface with sensory feedback for amputees or patients suffering from severe paralysis. More recent IMDs, such as retinal implants or brain-computer interfaces, demand higher performance to enable sophisticated therapies, while consuming power at higher orders of magnitude to handle more functions on a larger scale at higher rates, which limits the ability to supply the IMDs with primary batteries. Inductive power transmission across the skin is a viable solution to power up an IMD, while it demands high power efficiencies at every power delivery stage for safe and effective stimulation without increasing the surrounding tissue's temperature. This paper reviews various wireless neural stimulating systems and their power management techniques to maximize IMD power efficiency. We also explore both wireless electrical and optical stimulation mechanisms and their power requirements in implantable neural interface applications.

DSP를 위한 새로운 저전력 상위 레벨 합성 (A New Low Power High Level Synthesis for DSP)

  • 한태희;김영숙;인치호;김희석
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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    • pp.101-104
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    • 2002
  • This paper propose that is algorithm of power dissipation reduction in the high level synthesis design for DSP(Digital Signal Processor), as the portable terminal system recently demand high power dissipation. This paper obtain effect of power dissipation reduction and switching activity that increase correlation of operands as input data of function unit. The algorithm search loop or repeatedly data to the input operands of function unit. That can be reduce the power dissipation using the new low power high level synthesis algorithm. In this Paper, scheduling operation search same nodes from input DFG(Data Flow Graph) with correlation coefficient of first input node and among nodes. Function units consist a multiplier, an adder and a register. The power estimation method is added switching activity for each bits of nodes. The power estimation have good efficient using proposed algorithm. This paper result obtain more Power reduction of fifty percents after using a new low power algorithm in a function unit as multiplier.

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파워 숄더 재킷에 적용된 Crescent Shaped Sleeve의 패턴제도법 (Pattern Making Method for Crescent-Shaped Sleeve Used in Power Shoulder Jacket)

  • 이정순
    • 한국의상디자인학회지
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    • 제13권1호
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    • pp.59-71
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    • 2011
  • As an exaggerated-shoulder becomes a growing trend women's clothing, the crescent shaped sleeve with parallel style lines in the arm hole is a highly used women's sleeve pattern. This study develops and provides an applicable method for making the crescent shaped power shoulder sleeve. An efficient basic method for making the 2 piece crescent shaped sleeve was developed and the sensory appearance test was carried out with experimental clothes. There are two principles for making the crescent shaped sleeve: having a style line in the sleeve and pasting part of the cut arm hole of the bodice to the sleeve. The latter would be more convenient for a 2 piece sleeve, mostly used for jackets. The crescent shaped sleeve used in power shoulder jackets should set the shoulder angle as you wish to extend and raise the shoulder point of the bodice and sleeve to the same height. For a stronger power shoulder image, a 3 piece sleeve has a better appearance. Also, the height of the shoulder has to be enhanced with a shoulder pad for a more stable sleeve.

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Simultaneous Information and Power Transfer for Multi-antenna Primary-Secondary Cooperation in Cognitive Radio Networks

  • Liu, Zhi Hui;Xu, Wen Jun;Li, Sheng Yu;Long, Cheng Zhi;Lin, Jia Ru
    • ETRI Journal
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    • 제38권5호
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    • pp.941-951
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    • 2016
  • In this paper, cognitive radio and simultaneous wireless information and power transfer (SWIPT) are effectively combined to design a spectrum-efficient and energy-efficient transmission paradigm. Specifically, a novel SWIPT-based primary-secondary cooperation model is proposed to increase the transmission rate of energy/spectrum constrained users. In the proposed model, a multi-antenna secondary user conducts simultaneous energy harvesting and information forwarding by means of power splitting (PS), and tries to maximize its own transmission rate under the premise of successfully assisting the data delivery of the primary user. After the problem formulation, joint power splitting and beamforming optimization algorithms for decode-and-forward and amplify-and-forward modes are presented, in which we obtain the optimal PS factor and beamforming vectors using a golden search method and dual methods. Simulation results show that the proposed SWIPTbased primary-secondary cooperation schemes can obtain a much higher level of performance than that of non-SWIPT cooperation and non-cooperation schemes.

Design of Plasmonic Slot Waveguide with High Localization and Long Propagation Length

  • Lee, Ki-Sik;Jung, Jae-Hoon
    • Journal of the Optical Society of Korea
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    • 제15권3호
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    • pp.305-309
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    • 2011
  • We present an efficient design approach for a plasmonic slot waveguide using a genetic algorithm. The analyzed structure consists of a nanometric slot in a thin metallic film embedded within a dielectric. To achieve high confinement without long propagation length, the thickness and width of the slot are optimally designed in order to optimize the figures of merit including mode confinement and propagation length. The optimized design is based on the finite element method and enhances the guiding and focusing of light power propagation.

Design and simulation of a blanket module with high efficiency cooling system of tokamak focused on DEMO reactor

  • Sadeghi, H.;Amrollahi, R.;Zare, M.;Fazelpour, S.
    • Nuclear Engineering and Technology
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    • 제52권2호
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    • pp.323-327
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    • 2020
  • In this study, the neutronic calculation to obtain tritium breeding ratio (TBR) in a deuterium-tritium (D-T) fusion power reactor using Monte Carlo MCNPX is done. In addition, by using COMSOL software, an efficient cooling system is designed. In the proposed design, it is adequate to enrich up to 40% 6Li. Total tritium breeding ratio of 1.12 is achieved. The temperature of helium as coolant gas never exceed 687℃. As regards the tolerable temperature of beryllium (650℃), the design of blanket module is done in the way that beryllium temperature never exceed 600℃. The main feature of this design indicates the temperature of helium coolant is higher than other proposed models for blanket module, therefore power of electricity generation will increase.

용담댐 발전소 접지설계를 위한 대지비저항 모델링 및 접지저항 추정 (Earth Resistivity Modelling and Grounding Resistance Estimation for Yongdam Dam Power Station Grounding Design)

  • 오민환;김형수;김종득
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 C
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    • pp.1188-1191
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    • 1998
  • Detailed estimation of subsurface resistivity distribution and accurate estimation of actual fault current coming into the grounding system are indispensible to optimun grounding system design. Especially, it is essential for efficient grounding design to estimate subsurface resistivity distribution quantitatively and logically. Accurate estimation of subsurface resistivity distribution has an absolute influence on calculating touch voltage, step voltage and ground potential rise (GPR) which are related with grounding design standard for human safety. In this study, thirty-three electrical sounding surveys were made in Yongdam Power Station to obtain detailed subsurface resistivity distribution and the sounding data were interpreted quantitatively using multi-layered model. The results of the quantitative resistivity models were adopted practically to calculate grounding resistance values. Analytical asymptotic equations and CDEGS program were used in grounding resistance calculation and the results were compared and reviewed in the study.

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에너지 효율적인 FPGA 가속기 설계를 위한 하드웨어 및 소프트웨어 공동 설계 플랫폼 (Hardware and Software Co-Design Platform for Energy-Efficient FPGA Accelerator Design)

  • 이동규;박대진
    • 한국정보통신학회논문지
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    • 제25권1호
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    • pp.20-26
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    • 2021
  • 오늘날의 시스템들은 더 빠른 실행 속도와 더 적은 전력 소모를 위해 하드웨어와 소프트웨어 요소를 함께 포함하고 있다. 기존 하드웨어 및 소프트웨어 공동 설계에서 소프트웨어와 하드웨어의 비율은 설계자의 경험적 지식에 의해 나뉘었다. 설계자들은 반복적으로 가속기와 응용 프로그램을 재구성하고 시뮬레이션하며 최적의 결과를 찾는다. 설계를 변경하며 반복적으로 시뮬레이션하는 것은 시간이 많이 소모되는 일이다. 본 논문에서는 에너지 효율적인 FPGA 가속기 설계를 위한 하드웨어 및 소프트웨어 공동 설계 플랫폼을 제안한다. 제안하는 플랫폼은 가속기를 구성하는 주요 성분을 변수화해 응용 프로그램 코드와 하드웨어 코드를 자동으로 생성하여 설계자가 적절한 하드웨어 비율을 쉽게 찾을 수 있도록 한다. 공동 설계 플랫폼은 Xilinx Alveo U200 FPGA가 탑재된 서버에서 Vitis 플랫폼을 기반으로 동작한다. 공동 설계 플랫폼을 통해 1000개의 행을 가지는 두 행렬의 곱셈 연산 가속기를 최적화한 결과 응용프로그램보다 실행 시간이 90.7%, 전력 소모가 56.3% 감소하였다.