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http://dx.doi.org/10.6109/jkiice.2021.25.1.20

Hardware and Software Co-Design Platform for Energy-Efficient FPGA Accelerator Design  

Lee, Dongkyu (School of Electronic and Electrical Engineering, Kyungpook National University)
Park, Daejin (School of Electronic and Electrical Engineering, Kyungpook National University)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.25, no.1, 2021 , pp. 20-26 More about this Journal
Abstract
Recent systems contain hardware and software components together for faster execution speed and less power consumption. In conventional hardware and software co-design, the ratio of software and hardware was divided by the designer's empirical knowledge. To find optimal results, designers iteratively reconfigure accelerators and applications and simulate it. Simulating iteratively while making design change is time-consuming. In this paper, we propose a hardware and software co-design platform for energy-efficient FPGA accelerator design. The proposed platform makes it easy for designers to find an appropriate hardware ratio by automatically generating application program code and hardware code by parameterizing the components of the accelerator. The co-design platform based on the Vitis unified software platform runs on a server with Xilinx Alveo U200 FPGA card. As a result of optimizing the multiplication accelerator for two matrices with 1000 rows, execution time was reduced by 90.7% and power consumption was reduced by 56.3%.
Keywords
Co-design platform; FPGA(Field programmable gate array); Alveo U200; Vitis unified software platform; Hardware acceleration;
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