• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.17 no.11 s.114
• /
• pp.1105-1111
• /
• 2006

In this paper, using low-temperature co-fired ceramic(LTCC) based system-in-package(SiP) technology, a very compact power amplifier LTCC module was designed, fabricated, and then characterized for 60 GHz wireless transmitter applications. In order to reduce the interconnection loss between a LTCC board and power amplifier monolithic microwave integrated circuits(MMIC), bond-wire transitions were optimized and high-isolated module structure was proposed to integrate the power amplifier MMIC into LTCC board. In the case of wire-bonding transition, a matching circuit was designed on the LTCC substrate and interconnection space between wires was optimized in terms of their angle. In addition, the wire-bonding structure of coplanar waveguide type was used to reduce radiation of EM-fields due to interconnection discontinuity. For high-isolated module structure, DC bias lines were fully embedded into the LTCC substrate and shielded with vias. Using 5-layer LTCC dielectrics, the power amplifier LTCC module was fabricated and its size is $4.6{\times}4.9{\times}0.5mm^3$. The fabricated module shows the gain of 10 dB and the output power of 11 dBm at P1dB compression point from 60 to 65 GHz.

• Journal of Advanced Navigation Technology
• /
• v.27 no.6
• /
• pp.849-854
• /
• 2023

In this paper, a high-efficiency power amplifier was designed by applying the operating point Class J using LDMOS(laterally diffused metal oxide semiconductor) and optimizing the output matching circuit so that the second harmonic impedance becomes the reactance impedance. The designed power amplifier has a frequency of 108 ~ 110 MHz, Characteristics of PAE(power added efficiency) is 71.5% at P_SAT output (54.5 dBm), 55.5% at P_1dB output (51.5 dBm), and 24.38% at 45 dBm. The CSB(carrier with sideband) amplifier, which is the reference signal in the spatial modulation method, has an operating output of 45 dBm ~ 35 dBm, and linear SDM(sum in the depth of modulation) characteristics(40% ± 0.3%) were obtained. We measure the characteristics in amplitude modulation according to the bias operating point of the power amplifier for CSB and propose the optimal operating point to obtain linear modulation characteristics.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.19 no.11
• /
• pp.2228-2237
• /
• 1994

This paper describes the development of a Ku-band ($12.25GHz\sim12.75GHz$) SSPA intended as a replacement for TWTAs used in communication satelite transponder. The power stage of the amplifier consists of tow intrmally matched 8W FET divices combined using the branch-line coupler. To operate this stage, the drive stage has been designed with intermally matched 2W, 4W, 8W FET and two medium power FETs. The entire amplifier is made up by a aluminum chassis housing both the RF circuit and the bias circuitry. A regrlator/sequencing circuitry is used for FET biasing. The amplifier results implemented in this way show $41\pm0.3dB$ small-signal gain, 15W saturation power, a typical two tone $IM_3=-21.5dBc$ with single carrier backed off 5dB from saturation, $2^*/dBmax$ AM/PM conversion, and $3.47\pm0.25nsec$ group delay.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.18 no.5
• /
• pp.151-155
• /
• 2004

Millimeterwave OFDM wireless LAN system has been modeled for ACPR analysis. With simple AM-to-PM modeling for power amplifier and system simulation technique, power amplifier ACPR is simulated for OFDM modulation, Also, amplifier back-off value satisfying the required ACPR and the ACPR degradation have been predicted with the measured and modeled AM-tn-PM distortion.

• Proceedings of the KIEE Conference
• /
• 2003.07d
• /
• pp.2690-2692
• /
• 2003

Amplifier linearity plays a major role in the design of mordern communication systems. An independently controllable AM/AM and AM/PM predistortion linearizers that consists of two bias feed resistance linearizers is proposed. This linearizer allows independent adjustment of the AM/AM and AM/PM curves by using two adjustable voltages to compensate the power amplifier non-linearities. The predistortion linearizer can improve the ACPR by SdB with cdma2000 multi carrier signals. By applying this linearizer to two-tone 880MHz power amplifier, an improvement of adjacent channel leakage power up to 5dBm has been achieved.

• 한국정보통신설비학회:학술대회논문집
• /
• 2008.08a
• /
• pp.218-222
• /
• 2008

RF power amplifier requires linearization in order to reduce adjacent channel interference. And most of the existing linearization algorithms assume that a PA has memory-less nonlinearity. But for the wider bandwidth signal, the memory effect of PA cannot be ignored. This paper investigates digital pre-distortion by use of a memory polynomial model which compensates for amplifier nonlinearity and memory effect. The look-up table based implementation scheme is used to reduce the computational complexity of the pre-distortion block. The linearization performance is demonstrated on wideband CDMA signal and class AB high power amplifier.

• Journal of the Institute of Electronics Engineers of Korea TE
• /
• v.37 no.2
• /
• pp.83-90
• /
• 2000

A simple low-cost and small size 1.88-198 GHz Band RF power amplifier module is developed for IMT2000 repeater. The power amplifier consists of two stage amplifiers that the first stage amplifier is drive amplifier using discrete type P-HEMT (ATF-34143, 800 micron gate width, Agilent Technologies) and the second is power amplifier with 300Bm 1dB gain compression point using GaAs FET(EFA240D-SOT89, 2400 micron gate width, Excelics Semiconductor). this power amplifier module feature a 29.5dBm 1dB gain compression point, 29.5dB gain, 42dBm 3rd order intercept point(OIP3) and -10dB/-l2dB input/output return loss over the 1880-1980 MHz. This PA module is fully integrated using MIC technology into a small size and design by full nonlinear design technologies. The dimensions of this PA module are 42(L) $\times$ 34(W) mm.

• Proceedings of the IEEK Conference
• /
• 2006.06a
• /
• pp.623-624
• /
• 2006

In this paper, we introduce the design and fabrication of V-band power amplifier MMIC with excellent gain-flatness for IEEE 802.15.3c WPAN system. The V-band power amplifier was designed using ETRI' $0.12{\mu}m$ PHEMT process. The PHEMT shows a peak transconductance ($G_{m,peak}$) of 500 mS/mm, a threshold voltage of -1.2 V, and a drain saturation current of 49 mA for 2 fingers and $100{\mu}m$ total gate width (2f100) at $V_{ds}$=2 V. The RF characteristics of the PHEMT show a cutoff frequency, $f_T$, of 97 GHz, and a maximum oscillation frequency, $f_{max}$, of 166 GHz. The gains of the each stages of the amplifier were modified to have broadband characteristics of input/output matching for first and fourth stages and get more gains of edge regions of operating frequency range for second and third stages in order to make the gain-flatness of the amplifier excellently for wide band. The performances of the fabricated 60 GHz power amplifier MMIC are operating frequency of $56.25{\sim}62.25\;GHz$, bandwidth of 6 GHz, small signal gain ($S_{21}$) of $16.5{\sim}17.2\;dB$, gain flatness of 0.7 dB, an input reflection coefficient ($S_{11}$) of $-16{\sim}-9\;dB$, output reflection coefficient ($S_{22}$) of $-16{\sim}-4\;dB$ and output power ($P_{out}$) of 13 dBm. The chip size of the amplifier MMIC was $3.7{\times}1.4mm^2$.

• Journal of IKEEE
• /
• v.14 no.2
• /
• pp.90-97
• /
• 2010

The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device and DTMOS Error Amplifier is presented in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS(DT-CMOS) with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an DT-CMOS error amplifier and a comparator circuit as a block. the proposed DT-CMOS Error Amplifier has 72dB DC gain and 83.5deg phase margin. also Error Amplifier that use DTMOS more than CMOS showed power consumption decrease of about 30%. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device is achieved the high efficiency near 96% at 100mA output current. And DC-DC converter is designed with Low Drop Out regulator(LDO regulator) in stand-by mode which fewer than 1mA for high efficiency.

• Journal of electromagnetic engineering and science
• /
• v.17 no.4
• /
• pp.178-180
• /
• 2017

This study presents a 2-20 GHz monolithic distributed power amplifier (DPA) using a $0.25{\mu}m$ AlGaN/GaN on SiC high electron mobility transistor (HEMT) technology. The gate width of the HEMT was selected after considering the input capacitance of the unit cell that guarantees decade bandwidth. To achieve high output power using small transistors, a 12-stage DPA was designed with a non-uniform drain line impedance to provide optimal output power matching. The maximum operating frequency of the proposed DPA is above 20 GHz, which is higher than those of other DPAs manufactured with the same gate-length process. The measured output power and power-added efficiency of the DPA monolithic microwave integrated circuit (MMIC) are 35.3-38.6 dBm and 11.4%-31%, respectively, for 2-20 GHz.