• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2006.06b
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• pp.91-96
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• 2006

In this paper, the high efficiency Doherty power amplifier has been designed and realized for microwave applications. The Doherty amplifier has been implemented using silicon MRF 281 LOMOS FET. The RF performances of the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias..tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone. The realized Doherty power amplifier PldB output power has 33dBm at 2.3GHz frequency. Also the Doherty power amplifier shows 11dB gain and -17.8dB input return loss at 2.3GHz to 2.4GHz. The designed Doherty amplifier has been improved the average PAE by 10% higher efficiency than a class AB amplifier alone. The Maximum PAE of designed Doherty power amplifier has been 39%.

• Journal of Advanced Marine Engineering and Technology
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• v.29 no.6
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• pp.618-627
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• 2005

In this paper, we have compared and analyzed the performance of high amplifier using Doherty technique to improve linearity and efficiency of base station and repeater Power amplifier for WCDMA. This Doherty amplifier implements with 3dB branch line coupler and $90^{\circ}C$ transmission line The phase offset line is designed to maintain the high linearity and efficiency at the low efficiency Period of the power amplifier CW 1-tone experimental results at the WCDMA frequency $2.11{\sim}2.17GHz$ shows that Doherty amplifier which achieves power add efficiency(PAE) of 50% at 6dB back off the point from maximum output power 52.3 dBm, obtains higher efficiency of 13.3% than class AB Finding optimum bias Point after adjusted gate voltage, Doherty amplifier shows that $IMD_3$ improves 4dB.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2005.11a
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• pp.81-86
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• 2005

In this paper, we present an efficiency extension of Doherty power amplifier using LDMOS FET devices with different peak output powers and an unequal power divider. The amplifier is designed by using a MRF21045 with P1 dB of 45 W as the main amplifier biased for Class-AB operation and a MRF21090 with P1 dB of 90 W as the peaking amplifier biased for Class-C operation. The input power is divided into a 1:1.5 power ratio between the main and peaking amplifier. The simulated results of the proposed Doherty amplifier shows an efficiency improvement of approximately 19 % in comparison to the class-AB amplifier at an output power of 42.5 dBm. The fabricated Doherty amplifier obtained a PAE of 33.68 % at 9 dB backed off from P1 dB of 51.5 dBm.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.10 no.5
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• pp.99-104
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• 2011

This paper presents a high power and high efficiency unbalanced Doherty power amplifier used to extend the output power back-off (OPBO). The proposed unbalanced amplifier uses the same type of transistors in both the main amplifier and the peaking amplifier, similar to a conventional symmetric Doherty amplifier. The unbalanced amplifier can have the impedance of a ${\lambda}/4$ transformer located at the output of the main amplifier modified. This enables the OPBO to exceed 6 dB, the maximum OPBO for a conventional symmetric Doherty amplifier. The efficiency and linearity performance of the unbalanced Doherty amplifier are almost same as those found for the asymmetric Doherty amplifier, even though the unbalanced Doherty amplifier structure is simpler than the asymmetric Doherty structure. In order to verify the proposed amplifier performance, a 46 W Doherty amplifier has been both simulated and measured using a CDMA2000 1FA signal. From the measured results, the proposed unbalanced Doherty amplifier achieved an added power efficiency of 38 % and an adjacent channel power ratio of -34 dBc at a 885 kHz offset frequency and -35.6 dBc at a 1.98 MHz offset frequency.

• Journal of IKEEE
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• v.20 no.3
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• pp.279-284
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• 2016

This paper presents a two stage L-band power amplifier realized with a $0.32{\mu}m$ Silicon-On-Insulator (SOI) CMOS technology. To overcome a low breakdown voltage limit of MOSFET, stacked-FET structures are employed, where three transistors in the first stage amplifier and four transistors in the second stage amplifier are connected in series so that their output voltage swings are added in phase. The stacked-FET structures enable the proposed amplifier to achieve a 21.5 dB small-signal gain and 15.7 dBm output 1-dB compression power at 1.9 GHz with a 122 mA DC current from a 4 V supply. The amplifier delivers a 19.7 dBm. This paper presents a two stage L-band power amplifier realized with a $0.32{\mu}m$ Silicon-On-Insulator (SOI) CMOS technology. To overcome a low breakdown voltage limit of MOSFET, stacked-FET structures are employed, where three transistors in the first stage amplifier and four transistors in the second stage amplifier are connected in series so that their output voltage swings are added in phase. The stacked-FET structures enable the proposed amplifier to achieve a 21.5 dB small-signal gain and 15.7 dBm output 1-dB compression power at 1.9 GHz with a 122 mA DC current from a 4 V supply. The amplifier delivers a 19.7 dBm saturated output power with a 16 % maximum Power Added Efficiency (PAE). A bond wire fine tuning technology enables the amplifier a 23.67 dBm saturated output power with a 20.4 % maximum PAE. The die area is $1.9mm{\times}0.6mm$.

• Journal of Advanced Navigation Technology
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• v.9 no.2
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• pp.164-169
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• 2005

In this paper, the high efficiency Doherty power amplifier using adaptive bias technique has been designed and realized for 2.3GHz Wibro applications. The RF performances of the Doherty power amplifier using adaptive bias technique have been compared with those of a class AB amplifier alone, and conventional Doherty amplifier. The Maximum PAE of designed Doherty power amplifier with adaptive bias technique has been 36.6% at 34.0dBm output power. The proposed Doherty power amplifier showed an improvement 1dB at output power and 7.6% PAE than a class AB amplifier alone.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.11
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• pp.1934-1939
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• 2006

Current digital communication system is selecting very various digital Modulation way. Need linear power amplifier necessarily to reduce interference for contiguity channel maximum in this communication system and at the same time, power amplifier of high efficiency is required. In this paper Compare with result of equilibrium power amplifier that design Doherty power amplifier of way that linearity and efficiency are improved at the same time through simulation optimization techniques and at the same time design through simulation, efficiency 20% linearity showed 10dB that is improved.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.3
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• pp.437-441
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• 2012

In this paper, we have designed and manufactured 10MHz power source for the application of short distance wireless power transmission. The designed power source consists of a DDS(direct digital synthesizer) signal generator, a buffer driver and a balanced power amplifier. Short range wireless power transmission is usually carried out by near-field inductive coupling between source and load. The distance variation between source and load gives rise to the change of load impedance of power amplifier, which has effect on the operation of power amplifier. To overcome this problem due to load variation of power amplifier, we have adopted the balanced power amplifier using the quadrature hybrid implemented by lumped capacitors and a mutually coupled coil. The experiment results show the above 40dBm output power, frequency range of 9 to 11MHz, and total DC power consumption of 36W.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.6
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• pp.287-290
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• 2006

A class-E CMOS RF(Radio frequency) power amplifier with a 1.8 Volt power supply is designed using $0.25{\mu}m$ standard CMOS technology. To drive the class-E power amplifier, a Class-F RF power amplifier is used and the reliability characteristics are studied with a class-E load network. After one year of operating the power amplifier with an RF choke, the PAE(Power Added Efficiency) decreases from 60% to 47% and the output power decreases 29%. However, when a finite DC-feed inductor is used with the load, the PAE decreases from 60% to 53% and the output power decreases only 19%. The simulated results demonstrate that the class-E power amplifier with a finite DC-feed inductor exhibits superior reliability characteristics.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.11
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• pp.1311-1316
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• 2014

To be used in a transmitter of a satellite transponder of this paper, X band 25W power amplifier module, a part constituting of high-power amplifier is transmitted to the equipment for transmitting to geostationary communications satellites(36,000Km distance). PAM consisted a total of four power amplifier module has a high output characteristic of the high-output amplifier is used in the ground station. Used in conjunction with the structured type power amplifier module is composed of Serial Combining Structure. This PAM(Power Amplifier Module) configured by combining the circuit with the power amplifier, 10 MMIC chips and the Al2O3 thin film substrate using a Hybrid Technique of power amplifier module, was implemented at X band PAM(Power Amplifier Module) of 25W grade.