• Journal of electromagnetic engineering and science
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• v.11 no.3
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• pp.161-165
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• 2011

In this paper, a high-efficiency DC-AC converter is used for wireless energy transmission. The DC-AC convertter is implemented by combining the oscillator and power amplifier. Given that the conversion efficiency of a DC-AC converter is strongly affected by the efficiency of the power amplifier, a high-efficiency power amplifier is implemented using a class-E amplifier structure. Also, because of the low output power of the oscillator connected to the input stage of the power amplifier, a high-gain two-stage power amplifier using a drive amplifier is used to realize a high-output power DC-AC converter. The high-efficiency DC-AC converter is realized by connecting the oscillator to the input stage of the high-gain high-efficiency two-stage class-E power amplifier. The output power and the conversion efficiency of the DC-AC converter are 40.83 dBm and 87.32 %, respectively, at an operation frequency of 13.56 MHz.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.8
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• pp.1572-1579
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• 2009

In this dissertation ultra-broadband power amplifier(UPA) was designed and fabricated using negative feedback technique. UPA was made of pre-amplifier, drive amplifier and power amplifier. Negative feedback technique was used to achieve ultra-broadband performance. Designed power amplifier has 30dB gain and 2W output power. The load-pull data of power amplifier for optimal power matching was extracted from the measured S-parameter. Fabricated PCB material, permittivity is 4.6 and thickness is 0.8mm, is FR4 and UPA was fabricated 3 modules for comparison of the simulated and measured results. Size of the fabricated pre-amplifier and drive amplifier module is 40mm'50mm'16mm. And from the experimental results, gain of the pre-amplifier module is 9.87dB at 2GHz and flatness is 0.63dB. Experimental result of the drive amplifier module is 10.97dB at 2GHz and flatness of that is 0.26dB. Test result of the power amplifier module is 10.71dB at 2GHz and flatness is 0.72dB. Total size of the power amplifier is 45mm'134mm'16mm. According to the test results, gain of the UPA is 28.98dB at 2GHz and flatness is 1.68dB. Output power was 32.098dBm at 2GHz, 32.154dBm at 1GHz and 31.273dBm at 100MHz.

• 한국정보통신설비학회:학술대회논문집
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• 2008.08a
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• pp.403-408
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• 2008

In this paper, the high efficiency and linearity Doherty power amplifier using DGS and adaptive bias technique has been designed and realized for 2.3GHz WiBro applications. The Doherty amplifier has been implemented us-ing silicon MRF 281 LDMOS FET. The RF performances of the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias-tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone, and conventional Doherty amplifier. The Maximum PAE of designed Doherty power amplifier with DGS and adaptive bias technique has been 36.6% at 34.01dBm output power. The proposed Doherty power amplifier showed an improvement 1dB at output power and 7.6% PAE than a class AB amplifier alone.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.345-348
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• 2000

In this paper, A Feedforward Linear Power Amplifier for IMT-2000 which IMD characteristics was improved was designed and fabricated. To improve the main power amplifier IMD characteristics, the Feedback loop was added to basic Feedforward Power Amplifier structure. Therefore, the output power of error amplifier can be reduced, and it is easy to control the linearization circuit to cancel total IMD. The designed power amplifier represented the 40㏈m(l0W) output power and -55㏈C 3rd IMD at Center frequency 2.14㎓ (@5㎒).

• Journal of information and communication convergence engineering
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• v.17 no.4
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• pp.285-289
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• 2019

A 1.9-GHz linear CMOS power amplifier is presented. An adaptive bias circuit (ABC) that utilizes an AC ground to detect the power level of the input signal is proposed to enhance the linearity and efficiency of the power amplifier. The ABC utilizes the second harmonic component as the input to mitigate the distortion of the fundamental signal. The input power level of the ABC was detected at the AC ground located at the V_DD node of the power amplifier. The output of the ABC was fed into the inputs of the power stage. The input signal distortion was mitigated by detecting the input power level at the AC ground. The power amplifier was designed using a 180 nm RFCMOS process to evaluate the feasibility of the application of the proposed ABC in the power amplifier. The measured output power and power-added efficiency were improved by 1.7 dB and 2.9%, respectively.

• Journal of information and communication convergence engineering
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• v.6 no.2
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• pp.154-157
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• 2008

A class-E RF(Radio Frequency) power amplifier for wireless application is designed using standard CMOS technology. To drive the class-E power amplifier, a class-F RF power amplifier is used and the reliability characteristics are studied with a class-E load network. The reliability characteristic is improved when a finite-DC feed inductor is used instead of an RF choke with the load. After one year of operating, when the load is an RF choke the output current and voltage of the power amplifier decrease about 17% compared to initial values. But when the load is a finite DC-feed inductor the output current and voltage decrease 9.7%. The S-parameter such as input reflection coefficient(S11) and the forward transmission scattering parameter(S21) is simulated with the stress time. In a finite DC-feed inductor the characteristics of S-parameter are changed slightly compared to an RF-choke inductor. From the simulation results, the class-E power amplifier with a finite DC-feed inductor shows superior reliability characteristics compared to power amplifier using an RF choke.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.3
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• pp.383-390
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• 2018

Piezoelectric micro-machined ultrasonic transducers for highly directional speaker need DC bias voltage. Most existing power amplifiers are not suitable for use in highly directional transducers because they are based on AC. In addition, since the piezoelectric micro-machined ultrasonic transducer has a large capacitive reactance, the power efficiency of the power amplifier is very low. Thus this paper proposes a new high efficiency power amplifier with DC bias voltage. In addition, by designing a matching circuit to compensate the capacitive reactance of the micro-machined ultrasonic transducer, the power efficiency of the power amplifier increases. The operating characteristics of the proposed power amplifier was verified by an experimental prototype. The proposed power amplifier is expected to be widely used in designing and implementing other related power amplifiers.

• Journal of the Korea Institute of Military Science and Technology
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• v.13 no.6
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• pp.1071-1079
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• 2010

This paper describes the design and fabrication of a high-efficiency GaN HEMT(Gallium Nitride High-electron Mobility Transistor) Pallet power amplifier module for S-band phased array radar applications. Pallet amplifier module has a series 2-cascaded power amplifier and the final amplification-stage consists of balanced GaN HEMT transistor. In order to achieve high efficiency characteristic of pallet power amplifier module, all amplifiers are designed to the switching-mode amplifier. We performed with various PRF(Pulse Repetition Frequency) of 1, 10, 100 and 1000Hz at a fixed pulse width of $100{\mu}s$. In the experimental results, the output power, gain, and drain efficiency(${\eta}_{total}$) of the Pallet power amplifier module are 300W, 33dB, and 51% at saturated output power of 2.9GHz, respectively.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.1
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• pp.52-56
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• 2014

In this paper, a high-efficiency power amplifier is implemented using a gate and drain bias control circuit for WPT (Wireless Power Transmission). This control circuit has been employed to improve the PAE (Power Added Efficiency). The gate and drain bias control circuits consists of a directional coupler, power detector, and operation amplifier. A high gain two-stage amplifier using a drive amplifier is used for the low input stage of the power amplifier. The proposed power amplifier that uses a gate and drain bias control circuit can have high efficiency at a low and high power level. The PAE has been improved up to 80.5%.

• Journal of Navigation and Port Research
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• v.30 no.5 s.111
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• pp.351-356
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• 2006

In this paper, the high efficiency Doherty power amplifier has been designed and realized for microwave applications. The Doherty amplifier has been implemented using silicon MRF 281 LDMOS FET. The RF performances cf the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias-tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone. The realized Doherty power amplifier P1dB output power has 33dBm at 2.3GHz frequency. Also the Doherty power amplifier shows 11dB gain and -17.8dB input return loss at 2.3GHz to 2.4GHz. The designed Doherty amplifier has been improved the average PAE by 10% higher efficiency than a class AB amplifier alone. The Maximum PAE of designed Doherty power amplifier has been 39%.