• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.6
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• pp.584-591
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• 2004

The conventional analog-based firing circuit can be implemented by comparing a linearly decreasing periodic sawtooth waveform synchronized to the ac supply, with a control signal corresponding to the desired converter delay angle. This circuit requires a large number of passive components (resistance and capacitor) and careful adjustment of the synchronization circuity. In this paper a novel firing circuit is proposed for thyristor switch. The proposed circuit is implemented by using digital components(FPGA, A/D, and DSP etc.) on the basis of the analog cosine method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.7
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• pp.1579-1589
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• 1997

This paper introduces a monolithic chip 3.3V high-performance continuous-tune filter used in a CDP that can reconstruct the PDM or PWM signal output of a .SIGMA..DELTA. D/A converter. We also mentioned an active RC filter structure and filter order satisfying high-linearity and the design specification. In desigining the OP-AMP, using a structure that accepts some distortion we could reduce the chip area, and reducing the DC path using a new biascircuit gave us better power performance. The designed.SIGMA..DELTA. D/A converter post-processing filter does its smoothering operations and reconstructs the data without reducing the performance of the system.

• ETRI Journal
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• v.31 no.2
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• pp.234-236
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• 2009

We present a novel operational amplifier preset technique for a switched-capacitor circuit to reduce the acquisition time by improving the slewing. The acquisition time of a variable gain amplifier (VGA) using the proposed technique is reduced by 30% compared with a conventional one; therefore, the power consumption of the VGA is decreased. For additional power reduction, a programmable capacitor array scheme is used in the VGA. In the 0.13 ${\mu}m$ CMOS process, the VGA, which consists of three-stages, occupies 0.33 $mm^2$ and dissipates 19.2 mW at 60 MHz with a supply voltage of 1.2 V. The gain range is 36.03 dB, which is controlled by a 10-bit control word with a gain error of ${\pm}0.68$ LSB.

• The Journal of Information Systems
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• v.23 no.2
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• pp.25-47
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• 2014

Based on the levels of inter-organizational information flow and the degrees of suppliers' power, this study aims to develop a framework useful for classifying four types of the buyer's e-commerce strategies in manufacturing firms: e-marketplace, e-partnership, e-procurement and supplier's e-marketplace (e-distribution). We adopted a multi-methodological approach by mixing both qualitative and quantitative methods. After developing a framework, through the cases of Cisco, JAL, Toyota Motor, KIST, AMP, and 3M, this paper aims to confirm the actual existence of the four forms of e-commerce. The results from the cases supported the four types of e-commerce strategies in manufacturing firms. With the empirical data, we also demonstrated the configuration of the framework and the four types of e-commerce strategies, and identified the characteristics (i.e., size, age, actual adoption rate of the each type of e-commerce, and supply-chain performance) of the organizations employing each strategy.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.260-263
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• 2001

In this paper, we experimentally considered the stability of AT forward MRC with the characteristics of high efficiency and high power density. The converter ratings are input 48V, output 5V/50W, The maximum voltage stress is measured to about 170V of 2 times the input voltage when the input is 58V. The $81.66\%$ of maximum efficiency could be obtained. For the stability of the converter, it is compensated through the error op amp in MC34067. A phase margin and a gain margin for relative stability are measured using HP4194A network analyzer.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.1
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• pp.66-73
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• 2021

This study presents a novel four-channel light-emitting diode (LED) current balancing topology using a current-fed hybrid quasi-Z-source converter. With the proposed structure, currents flowing through four LED strings are automatically balanced owing to the charge (amp-sec) balance condition on capacitors. Thus, automatic current balancing of the proposed driver is simple and precise. In addition, the proposed LED driver uses only one active switch and three diodes. The operating principle and characteristics of the proposed four-channel LED driver are analyzed in detail. To verify the operation of the proposed LED driver, a prototype is built and tested with different numbers of LEDs.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.10
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• pp.57-63
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• 2014

This paper proposes an architecture of $3^{rd}$ order SDM(Sigma-Delta Modulator) with delayed feed-forward path in order to reduce the power consumption and area. The proposed SDM improve the architecture of conventional $3^{rd}$ order SDM which consists of two integrators. The proposed architecture can increase the coefficient values of first stage doubly by inserting the delayed feed-forward path. Accordingly, compared with the conventional architecture, the capacitor value($C_I$) of first integrator is reduced by half. Thus, because the load capacitance of first integrator became the half of original value, the output current of first op-amp is reduced as 51% and the capacitance area of first integrator is reduced as 48%. Therefore, the proposed method can optimize the power and the area. The proposed architecture in this paper is simulated under conditions which are supply voltage of 1.8V, input signal 1Vpp/1KHz, signal bandwidth of 24KHz and sampling frequency of 2.8224MHz in the 0.18um CMOS process. The simulation results are SNR(Signal to Noise Ratio) of 88.9dB and ENOB(Effective Number of Bits) of 14-bits. The total power consumption of the proposed SDM is $180{\mu}W$.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.4
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• pp.397-402
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• 2013

This paper proposes a new passive type LED driver which satisfies the standard of power factor (PF) and total harmonic distortion (THD). The proposed passive LED driver also has high-efficiency and long-life time characteristics compared to active LED driver which is composed of op-amp, switches and so on. By using just passive components such as inductor, capacitor, and diode, it has resolved extremely short-life time and low-efficiency problems of previous LED drivers. It has achieved PF of 0.99, THD of 16.4 %, and the total efficiency of 95 %. The proposed passive LED driver is fully analyzed and verified by simulations and experiments, which results are in good agreement each other.

• Journal of Power Electronics
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• v.11 no.4
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• pp.527-532
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• 2011

Due to the need for improved fuel consumption and the trend towards increasing the electrical content in automobiles, integrated starter generator (ISG) systems are being considered by the automotive industry. In this paper, in order to change the conventional generator of a vehicle, a belt driven integrated starter generator is considered. The overall ISG system, the design considerations for the claw pole type AC electric machine and a low voltage very high current power stage implementation are discussed. Test data on the low voltage claw pole type machine is presented, and a large current voltage source DC/AC inverter suitable for low voltage integrated starter generator operation is also presented. A metal based PCB (Printed Circuit Board) power unit to attach the 4-parallel MOS-FETs is used to achieve extremely high current capability. Furthermore, issues related to the torque assistance during vehicle acceleration and the generation/regeneration characteristics are discussed. A prototype with the capability of up to 1000 A and 27 V is designed and built to validate the kilo-amp inverter.

• Journal of Power Electronics
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• v.13 no.4
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• pp.516-527
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• 2013

This paper presents a new overall system for state-of-available-power (SoAP) prediction for a lithium-ion battery pack. The essential part of this method is based on an adaptive network architecture which utilizes both fuzzy model (FIS) and artificial neural network (ANN) into the framework of adaptive neuro-fuzzy inference system (ANFIS). While battery aging proceeds, the system is capable of delivering accurate power prediction not only for room temperature, but also at lower temperatures at which power prediction is most challenging. Due to design property of ANN, the network parameters are adapted on-line to the current battery states (state-of-charge (SoC), state-of-health (SoH), temperature). SoC is required as an input parameter to SoAP module and high accuracy is crucial for a reliable on-line adaptation. Therefore, a reasonable way to determine the battery state variables is proposed applying a combination of several partly different algorithms. Among other SoC boundary estimation methods, robust extended Kalman filter (REKF) for recalibration of amp hour counters was implemented. ANFIS then achieves the SoAP estimation by means of time forward voltage prognosis (TFVP) before a power pulse occurs. The trade-off between computational cost of batch-learning and accuracy during on-line adaptation was optimized resulting in a real-time system with TFVP absolute error less than 1%. The verification was performed on a software-in-the-loop test bench setup using a 53 Ah lithium-ion cell.