• 한국전기전자재료학회논문지
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• 제17권1호
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• pp.1-6
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• 2004

Dry etch characteristics of polysilicon with HBr/O$_2$ inductively coupled plasma (ICP) have been investigated. We determined etch late, uniformity, etch profiles, and selectivity with analyzing the cross-sectional scanning electron microscopy images obtained from top, center, bottom, right, and left positions. The etch rate of polysilicon was about 2500 $\AA$/min, which meets with the mass production for devices. The wafer level etch uniformity was within $\pm$5 ％. Etch profile showed 90$^{\circ}$ slopes without notches. The selectivity over photoresist was between 2:1∼4.5:1, depending on $O_2$ flow rate. The HBr-ICP etching showed higher PR selectivity, and sharper profile than the conventional Cl$_2$-RIE.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.376-377
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• 2006

Chemical Mechanical Planarization (CMP) has emerged as an enabling technology for the manufacturing of multi-level metal interconnects used in high-density Integrated Circuits (IC). Recently, multi-level structures have been also widely used m the MEMS device such as micro engines, pressure sensors, micromechanical fluid pumps, micro mirrors and micro lenses. Especially, among the thin films available in IC technologies, polysilicon has probably found the widest range of uses in silicon technology based MEMS. This paper presents the characteristic of polysilicon CMP for multi-level MEMS structures. Two-step CMP process verifies that is possible to decrease dishing amount with two type of slurries characteristics. This approach is attractive because two-step CMP process can be decreased dishing amount considerably more then just one CMP process.

• 대한전자공학회논문지
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• 제24권6호
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• pp.975-979
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• 1987

The recrystallization of polysilicon layer deposited on SiO2 was attempted by means of CO2 laser annealing in this paper. SiO2 layer of 13000\ulcornerthick and polysilicon layer of 6000\ulcornerthick were successively deposited on (100) Si wafer by thermal oxidation and LPCVD, respectively. Prior to the annealings the polysilicon layer was defined in small island patterns by means of photolithography. After the annealing an increase in grain size from 1000\ulcornerto 2-10 =\ulcorner was observed by SEM.

• 전자공학회논문지A
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• 제29A권4호
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• pp.28-32
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• 1992

The electrical properties of ONO interpoly dielectrics grown by polycrystalline silicon have been studied. The polysilicon layer deposited as amorphous state kept its surface smoothness even after subsequent heat cycle induced crystallization. Polysilicon was doped with a POCl$_3$ and arsenic ion implantation. Arsenic was implanted in several different doses. The effective barrier heights calculated from F-N plotting method and breakdown fields increased as the polysilicon doping concentration increased. On the other hand they mere degraded when arsenic concentration in polysilicon exceeded 2{\times}10^{20}[cm^{-3}]$. The reliability of dielectric as monitored by TDDB infant fail and breakdown field showed increasing degradation as doping concentration increased

• Transactions on Electrical and Electronic Materials
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• 제18권6호
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• pp.316-319
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• 2017

A new approach to improving the electrical characteristics and optical response of a polysilicon-based metal-semiconductor-metal (MSM) photodetector is proposed. To understand the cause of current restriction in the MSM photodetector, modified trap mechanisms are suggested, which include interfacial electron traps at the metal/polysilicon interface and silicon dangling bonds between silicon crystallite grains. Those traps were passivated using hydrogen ion implantation with subsequent post-annealing. Photodetectors that were ion-implanted under optima conditions exhibited improved photoconductivity and reduced dark current instability, implying that the hydrogen bonds in the polysilicon influence the simultaneous decreases in the density of dangling bonds at grain boundaries and the trapped positive charges at the contact interface.

• 한국건축시공학회:학술대회논문집
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• 한국건축시공학회 2012년도 춘계 학술논문 발표대회
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• pp.85-86
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• 2012

This application plan is hasty prepared with the actual condition in which the majority is reclaimed by the waste with the marine and the polysilicon sludge, that is the main raw material of the solar pannel support, does. In this research, by using OPC and Fly ash, the applicability as the blending material of the polysilicon sludge was analyze and it tried to contribute to the waste reduction afterward. The replacement ratio of the sludge was set to 5. 10, 15, 20(%) with the experiment based on the based test result and the air flow rate, liquidity, flexural strength, and compressive strength was measured. The liquidity was reduced in spite of as the replacement ratio of the sludge increased and the air flow rate increased.

• Korean Chemical Engineering Research
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• 제46권1호
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• pp.37-49
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• 2008

태양전지 기판의 원료인 폴리실리콘의 공급부족은 태양광발전산업의 비약적인 발전에 있어 최대 걸림돌이 되고 있다. 태양전지 제조에 충분한 순도로 폴리실리콘을 값싸게 제조할 수 있게 하는 공정기술의 개발은 태양광발전의 가격 경쟁력과 활용범위를 크게 증가시키는 중요한 계기가 될 수 있다. 본 총설에서는 태양전지용 폴리실리콘 제조를 위해 현재 이용 가능한 기술들을 정리해보고, 최근에 주목받고 있는 유동층 석출공정기술과 관련하여 응용범위 확대를 가로막고 있는 주요 기술적 장애요인에 대하여 중점적으로 소개하고자 한다.

• 센서학회지
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• 제5권1호
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• pp.57-62
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• 1996

하이퍼어브��트 접합구조의 $p^{+}n$ 다이오드의 누설전류를 감소시키기 위하여 $3000{\AA}$ 두께의 다결정 실리콘을 다이오드의 상층부에 증착하여 $900^{\circ}C$, $N_{2}$ 분위기에서 30분간 어닐링하였다. 다결정 실리콘 유무 및 n 확산층의 불순물 종류에 따른 다이오드의 누설전류 특성을 조사하였으며, 다결정 실리콘을 사용하였을 때 누설전류의 크기를 약 $\frac{1}{1000}$배 감소시킬 수 있었다. TEM 분석을 통하여 활성화 영역에 존재하였던 많은 전위 루프들이 그 표면 위에 다결정 실리콘을 사용함으로써 제거됨을 알 수 있었다. 그리고 이 결함들은 As의 이온주입에 의한 n 확산층에 의해 유발됨을 알 수 있었다.

• 한국건설순환자원학회논문집
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• 제6권4호
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• pp.275-282
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• 2018

본 연구에서는 활성황토 혼합 시멘트와 폴리실리콘 슬러지를 활용한 경화체의 기초물성 평가를 위한 실험을 진행하였다. 산업부산물의 재활용과 환경오염에 대한 문제를 해결하고자 폴리실리콘 슬러지의 활용방안을 제시하였으며, 폴리실리콘 슬러지 치환율에 따른 페이스트와 잔골재 첨가율에 따른 모르타르의 특성을 분석하였다. W/B 및 PS 치환율이 증가할수록 강도 및 밀도는 감소하는 경향을 보인다. 잔골재 첨가율에 따른 모르타르의 밀도 및 흡수율은 잔골재의 첨가율이 증가할수록 밀도는 감소하는 경향을 보이며, 흡수율은 증가하는 경향을 보인다. 잔골재 첨가율에 따른 모르타르의 유동성 및 공기량은 잔골재의 첨가율이 증가할수록 유동성은 감소하는 경향을 보이며, 공기량은 증가하는 경향을 보인다. 잔골재 첨가율에 따른 모르타르의 휨강도 및 압축강도는 잔골재의 첨가율이 증가할수록 감소하는 경향을 보인다.

• 대한금속재료학회지
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• 제46권2호
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• pp.69-79
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• 2008

A composition consisting of 10 nm-Ni/1 nm-Pd/(30 nm or 70 nm-poly)Si was thermally annealed using rapid thermal for 40 seconds at $300{\sim}1100^{\circ}C$ to improve the thermal stability of conventional nickel monosilicide. The annealed bilayer structure developed into $Ni(Pd)Si_x$, and the resulting changes in sheet resistance, microstructure, phase, chemical composition, and surface roughness were investigated. The silicide, which formed on single crystal silicon, could defer the transformation of $NiSi_2$, and was stable at temperatures up to $1100^{\circ}C$. It remained unchanged on polysilicon substrate compared with the sheet resistance of conventional nickel silicide. The silicides annealed at $700^{\circ}C$, formed on single crystal silicon and 30 nm polysilicon substrates exhibited 30 nm-thick uniform silicide layers. However, silicide annealed at $1,000^{\circ}C$ showed preferred and agglomerated phase. The high resistance was due to the agglomerated and mixed microstructures. Through X-ray diffraction analysis, the silicide formed on single crystal silicon and 30 nm polysilicon substrate, showed NiSi phase on the entire temperature range and mixed phases of NiSi and $NiSi_2$ on 70 nm polysilicon substrate. Through scanning probe microscope (SPM) analysis, we confirmed that the surface roughness increased abruptly until 36 nm on 30 nm polysilicon substrate while not changed on single crystal and 70 nm polysilicon substrates. The Pd-inserted nickel monosilicide could maintain low resistance in a wide temperature range and is considered suitable for nano-thick silicide processing.