• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2009년도 추계학술대회 논문집
• /
• pp.131-131
• /
• 2009

This paper describes the fabrication and characteristics of polycrystalline (poly) 3C-SiC microresonators with $3{\times}10^{17}{\sim}1{\times}10^{19}cm^{-3}$ in-situ N-doping concentrations. In this work, the crystallinity, carrier concentration and surface morphology of the grown thin films were evaluated by X-ray diffraction (XRD), scanning electron microscopy (SEM) and atomic force microscopy (AFM). The 1.2 ${\mu}m$ thick cantilvers and the 0.4 ${\mu}m$ thick doubly-clamped beam microresonators with various lengths were implemented using in-situ doping poly 3C-SiC thin films. The characteristics of the poly 3C-SiC microresonators were evaluated using quartz and a laser vibrometer under vacuum at room temperature. The resonant frequencies of the SiC microresonators decreased with doping concentrations owing to the reduction of the Young's modulus of the poly 3C-SiC thin films. It was confirmed that the resonant frequencies of the poly 3C-SiC microresonators are controllable by adjusting the doping concentrations.

• 한국전산구조공학회논문집
• /
• 제24권1호
• /
• pp.9-16
• /
• 2011

다상 재료는 상(phase) 분포 상태에 의해 그 특성이 다르기 때문에 상 분포에 따른 재료의 특성을 이해하는 것이 중요하다. 본 연구에서는 미세구조의 상 분포 특성을 묘사할 수 있는 확률 분포 함수를 사용하여 등방성/이방성 미세구조의 상분포 상태를 표현하는 방법을 살펴보았다. 다양한 상 분포를 가진 미세구조들에 유한요소해석 기법을 적용하여 미세구조의 역학적인 거동을 분석함으로서, 상 군집의 분포 상태에 따른 재료의 강도 및 특성의 변화를 살펴보았다. 이를 통해 상 군집의 위상에 의한 재료 강도의 영향 및 군집 크기가 커질수록 강도가 낮아지는 현상을 확인하였다.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
• /
• pp.243.2-243.2
• /
• 2016

Tungsten (W) is recently gaining attention as a potential candidate to replace Cu in semiconductor metallization due to its expected improvement in material reliability and reduced resistivity size effect. In this study, the impact of electron scattering at grain boundaries in a polycrystalline W thin film was investigated. Two nominally 300 nm-thick films, a (110)-oriented single crystal film and a (110)-textured polycrystalline W film, were prepared onto (11-20) Al2O3 substrate and thermally oxidized Si substrate, respectively in identical fabrication conditions. The lateral grain size for the polycrystalline film was determined to be $119{\pm}7nm$ by TEM-based orientation mapping technique. The film thickness was chosen to significantly exceed the electron mean free path in W (16.1 and 77.7 nm at 293 and 4.2 K, respectively), which allows the impact of surface scattering on film resistivity to be negligible. Then, the difference in the resistivity of the two films can be attributed to grain boundary scattering. quantitative analyses were performed by employing the Mayadas-Shatzkes (MS) model, where the grain boundary reflection coefficient was determined to be $0.42{\pm}0.02$ and $0.40{\pm}0.02$ at 293 K and 4.2 K, respectively.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
• /
• pp.305-308
• /
• 2004

We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2009년도 하계학술대회 논문집
• /
• pp.195-196
• /
• 2009

This paper describes the fabrication and characteristics of polycrystalline 3C-SiC thin film diodes for extreme environment applications, in which the this thin film was deposited onto oxidized Si wafers by APCVD using HMDS In this work, the optimized growth temperature and HMDS flow rate were $1,100^{\circ}C$ and 8sccm, respectively. A Schottky diode with a Au, Al/poly 3C-SiC/$SiO_2$/Si(n-type) structure was fabricated and its threshold voltage ($V_d$), breakdown voltage, thickness of depletion layer, and doping concentration ($N_D$) values were measured as 0.84V, over 140V, 61nm, and $2.7{\times}10^{19}cm^2$, respectively. To produce good ohmic contact, Al/3C-SiC were annealed at 300, 400, and $500^{\circ}C$ for 30min under a vacuum of $5.0{\times}10^{-6}$Torr. The obtained p-n junction diode fabricated by poly 3C-SiC had similar characteristics to a single 3C-SiC p-n junction diode.

• 전기화학회지
• /
• 제3권2호
• /
• pp.104-108
• /
• 2000

전기화학에 있어서 전극 물질의 실제 거칠기(real roughness)를 아는 것은 매우 중요하다. 그러나 여러 가지 이유 때문에 전극 물질의 절대적인 거칠기를 아는 것은 불가능하다. 여기에서는 scanning tunneling microscopy (STM), 순환전압전류법을 이용하여 전기화학에서 자주 사용하는 다결정 금 전극의 거칠기를 구하여 Au(111), HOPG로부터 구한 거칠기와 비교해 보았다. STM으로부터 얻은 다결정 금전극의 거칠기는 $1.1(\pm0.1)$,산소의 탈착으로부터는 $2.4(\pm0.7)$, N-docosyl-N'-methyl viologen의 흡착으로부터 는 $1.6(\pm0.1)$이 얻어졌다.

• 한국진공학회지
• /
• 제13권1호
• /
• pp.29-33
• /
• 2004

본 논문에서는 RF 마그네트론 스퍼터링법으로 비정질 실리콘을 증착하여 진공분위기에서 엑시머 레이저 어닐링을 이용하여 플라스틱 기판위에 극저온 다결정 실리콘 박막(＜$150^{\circ}C$)을 형성하였다. 비정질 실리콘 박막은 $120^{\circ}C$에서 Ar/He 혼합가스로 증착하였으며, Rutherford Backscattering Spectrometry로 측정한 박막내 아르곤 함량은 2% 이하였다. 에너지 밀도 320mJ/$\textrm{cm}^2$일 때 다결정 실리콘의 결정화도는 62%, Root-Mean-Square roughness는 267$\AA$를 나타내었다. 엑시머 레이저 결정화 후 결정립의 크기는 50nm에서 100nm 정도를 나타내었다.

• 한국세라믹학회지
• /
• 제32권2호
• /
• pp.163-170
• /
• 1995

Sample size effect on ferromagnetic resonance (FMR) in polycrystalline MgFe2O4 has been investigated. The signal intensity (SI), resonance field (Hres) and line width (ΔH) were found to increase proportionally to r3 with the increase of sample radius. The r3-depencence of SI means the complete penetration of rf-field into the sample, and the broadening of ΔH due to the sample size appears to be closely related to the amount of scattering sources like pores. Meanwhile, the values of Hres (0) and ΔH (0) obtained by extrapolating the data of Hres (r) and ΔH (r) measured at several sizes to r=0, were in good agreement with those calculated using the Schlomann's equations for internal field and ΔH, respectively. This result indicates that the discrepancy between the measured FMR parameters and those calculated by Schlomann's equation could be ascribed to the effect of sample size. Thus it is suggested that the size effect on FMR should be removed for the analysis of the FMR parameters. Meanwhile, our result for the size dependance of ΔH was found to be contradictory to those reported by Dionne, where ΔH 1/r at a given surface roughness. This discrepancy appears to arise from the difference in the definition of reading the line width.

• 센서학회지
• /
• 제16권2호
• /
• pp.85-90
• /
• 2007

This paper presents the growth conditions and characteristics of polycrystalline 3C-SiC (silicon carbide) thin films for M/NEMS applications related to harsh environments. The growth of the 3C-SiC thin film on the oxided Si wafers was carried out by APCVD using HMDS (hexamethyildisilane: $Si_{2}(CH_{3})_{6})$ precursor. Each samples were analyzed by XRD (X-ray diffraction), FT-IR (fourier transformation infrared spectroscopy), RHEED (reflection high energy electron diffraction), GDS (glow discharge spectrometer), XPS (X-ray photoelectron spectroscopy), SEM (scanning electron microscope) and TEM (tunneling electro microscope). Moreover, the electrical properties of the grown 3C-SiC thin film were evaluated by Hall effect. From these results, the grown 3C-SiC thin film is very good crystalline quality, surface like mirror and low defect. Therefore, the 3C-SiC thin film is suitable for extreme environment, Bio and RF M/NEMS applications in conjunction with Si fabrication technology.

• 한국재료학회지
• /
• 제18권9호
• /
• pp.507-510
• /
• 2008

Electrical properties of multi-channel metal-induced unilaterally precrystallized polycrystalline silicon thin-film transistor (MIUP poly-Si TFT) devices and circuits were investigated. Although their structure was integrated into small area, reducing annealing process time for fuller crystallization than that of conventional crystal filtered MIUP poly-Si TFTs, the multi-channel MIUP poly-Si TFTs showed the effect of crystal filtering. The multi-channel MIUP poly-Si TFTs showed a higher carrier mobility of more than 1.5 times that of the conventional MIUP poly-Si TFTs. Moreover, PMOS inverters consisting of the multi-channel MIUP poly-Si TFTs showed high dynamic performance compared with inverters consisting of the conventional MIUP poly-Si TFTs.