• Proceedings of the KIEE Conference
• /
• 2001.07c
• /
• pp.1448-1450
• /
• 2001

본 연구에서는 알루미늄 마스크를 이용하여 다결정 실리콘 결정립의 수평성장을 유도하는 새로운 엑시머 레이저 어닐링 방법을 제안한다. 제안된 방법은 비정질 실리콘 박막 위에 알루미늄 패턴을 형성하여 선택적으로 레이저 빔을 차단시키고, 액상 실리콘의 열을 금속박막을 통해 방출시킴으로써 다결정 실리콘 결정립의 수평성장을 유도할 수 있다. 제안된 레이저 결정화 방법을 이용하여 최대 1.6${\mu}m$의 수평성장 결정립을 형성하였고, 알루미늄 패턴의 경계로부터 결정립을 성장시킴으로써 결정립 경계의 위치를 제어하였다. 제안된 방법을 이용하여 제작한 다결정 실리콘 박막 트랜지스터는 기존의 다결정 실리콘 박막 트랜지스터에 비해 전계효과 이동도 및 온/오프 전류비 등의 전기적 특성이 우수하였다.

• Transactions on Electrical and Electronic Materials
• /
• v.11 no.6
• /
• pp.257-260
• /
• 2010

Zinc oxide (ZnO) bottom-contact thin-film transistors (TFTs) were prepared by the use of injector type atomic layer deposition. Two hybrid gate oxide systems of different polarity polymers with silicon oxide were examined with the aim of improving the properties of the transistors. The mobility and threshold voltage of a ZnO TFT with a poly(4-dimethylsilyl styrene) (Si-PS)/silicon oxide hybrid gate dielectric had values of 0.41 $cm^2/Vs$ and 24.4 V, and for polyimide/silicon oxide these values were 0.41 $cm^2/Vs$ and 24.4 V, respectively. The good hysteresis property was obtained with the dielectric of hydrophobicity. The solid output saturation behavior of ZnO TFTs was demonstrated with a $10^6$ on-off ratio.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2010.06a
• /
• pp.345-345
• /
• 2010

1T-DRAM cell with solid phase (SPC) crystallized poly-Si thin film transistor was fabricated and electrical characteristics were evaluated. The fabricated device showed kink effect by negative back bias. Kink current is due to the floating body effect and it can be used to memory operation. Current difference between "1" state and "0" state was defined and the memory properties can be improved by using gate induced drain leakage (GIDL) current.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2002.08a
• /
• pp.167-170
• /
• 2002

We have proposed new pixel structures for Active Matrix OELD (AMOELD) to improve the uniformity of luminance and manufactured a full-color 3.6-inch QVGA AMOELD. The proposed pixel structures, composed of four TFTs and one capacitor, can display 64 gray scales by compensating threshold voltage (Vth) variation of driving TFTs. Nonuniformity and peak intensity of measured luminance are under 14% and over $200cd/m^2$, respectively.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2002.08a
• /
• pp.325-328
• /
• 2002

We developed a high performance 2.2" active matrix OLED display for IMT-2000 mobile phone. Scan and Data driver circuits were integrated on the glass substrate, using low temperature poly-Si(LTPS) TFT CMOS technology. High efficiency EL materials were employed to the panel for low power consumption. Peak luminescence of the panel was higher than 250cd/$m^2$ with power consumption of 200mW.

• Proceedings of the KIEE Conference
• /
• 2002.07c
• /
• pp.1400-1402
• /
• 2002

금속유도 측면 결정화 (Metal Induced Lateral Crystallization; MILC)를 통하여 형성한 다결정 실리콘 박막에 엑시머 (excimer) 레이저를 조사하여 우수한 특성을 갖는 박막 트랜지스터를 제작하였다. MILC 공정 중에 형성되는 금속 유도 결정화 (Metal Induced Crystallization; MIC) 실리콘 박막은 다량의 Ni을 함유하고 있기 때문에, 이에 인접한 MILC 실리콘 박막 내에는 니켈 농도의 점진적인 차이가 발생한다. MILC 다결정 실리콘 박막 내의 Ni 농도 차이는 실리콘 박막의 용융점 차이를 유발하여 레이저 결정화 시에 매우 큰 실리콘 결정립의 성장을 유도한다. 새로운 다결정 실리콘 박막 트랜지스터는 기존의 레이저 결정화 방식으로 제작한 다결정 실리콘 박막 트랜지스터에 비하여 40% 향상된 전계효과 이동도를 나타내었다.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2005.07a
• /
• pp.307-309
• /
• 2005

We investigated light absorption layer effect on metal-induced lateral crystallization (MILC) growth rate and MILC thin films transistors (TFTs). As annealing method, we used scanning-rapid thermal annealing (RTA). MILC growth rate which was crystallized by light absorption layer and using scanning-RTA was 3 times than normal MILC which was without light absorption layer growth rate. Also we compared MILC TFTs characteristics which were combined to light absorption layer with conventional MILC TFTs. After scanning-RTA process, MILC-TFTs which were with light absorption layer were superior to conventional MILC-TFTs. With this new MILC-TFTs structure, we could reduced crystallization time and obtain good electrical properties.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2009.10a
• /
• pp.1136-1139
• /
• 2009

Recently, various Ni doping systems and thermal annealing systems have been developed for fabrication of polycrystalline silicon film using SGS (super grain silicon) for medium and largesize AMOLED panels. In this study, we compare the potential of Ni doping systems including ALD (atomic layer deposition), AMD (atmospheric metal deposition), in-line sputter, and crystallization annealing systems including batch type furnace, inline furnace, and RTA (rapid thermal annealing) developed for the SGS method. Additional requirements for those systems to be used for mass production of large AMOLED TVs are suggested based on evaluation results for both poly-Si films and TFT backplanes.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2007.08a
• /
• pp.409-412
• /
• 2007

A lot of research for system-on-panel(SOP) have been done to integrate display systems including data driver, gate driver, timing controller, DC-DC converter, and smart functions such as embedded touch screen, ambient brightness sensing and luminance control, finger printing on the glass. Recently, the cost of an one-chip driver IC with various functions has decreased rapidly, and new mobile display interface technologies have been introduced. So it is necessary to examine the feasibility of SOP for practical mobile applications. In this paper, we will re-examine LTPS technologies for mobile displays in terms of various aspects and discuss the practical limitations on SOP technology and future technology trend of mobile displays.

• Proceedings of the KIEE Conference
• /
• 1993.07b
• /
• pp.1292-1294
• /
• 1993

This paper proposes a new structure of polycrystalline silicon(poly-Si) thin film transistor(TFT) having a thick gate-oxide below the gate edge. The new structure is fabricated by the gate re-oxidation in wet ambient. It is shown that the thick gate-oxide below the gate edge is effective in reducing the leakage current and the gate-drain overlap capacitance. We have simulated this device by using the SSUPREM4 process simulator and the SPISCES-2B device simulator. As a simulation result it is found that the new structure provides a low tentage current less than 0.2 pA and achieves a on/off ratio as high as $5{\times}10^7$.