• Proceedings of the Korean Vacuum Society Conference
• /
• 2011.02a
• /
• pp.153-153
• /
• 2011

유리나 폴리머를 기판으로 하는 TFT(Thin film transistor), solar cell에서는 낮은 공정 온도에서($200{\sim}500^{\circ}C$) amorphous semiconductor thin film을 poly-crystal semiconductor thin film으로 결정화 시키는 기술이 매우 중요하게 대두 되고 있다. Ge은 Si에 비해 높은 carrier mobility와 낮은 녹는점을 가지므로, 비 저항이 낮을 뿐만 아니라 더 낮은 온도에서 결정화 할 수 있다. 하지만 일반적으로 쓰이는 Ge의 결정화 방법은 비교적 높은 열처리 온도를 필요로 하거나, 결정화된 원소에 남아있는 metal이 불순물 역할을 한다는 문제점, 그리고 불균일한 결정크기를 만든다는 단점이 있었다. 그 중에서도 현재 가장 많이 쓰이고 있는 MIC, MILC는 metal과 a-Ge이 접촉되는 interface나, grain boundary diffusion에 의해 핵 생성이 일어나고, 결정이 성장하는 메커니즘을 가지고 있으므로 단순 증착과 열처리 만으로는 앞서 말한 단점을 극복하는데 한계를 가지고 있다. 이에 PIII&D 장비를 이용하면, 이온 주입된 원소들이 모재와 반응 할 수 있는 표면적이 커짐으로 핵 생성을 조절 할 수 있을 뿐만 아니라, 이온 주입 시 발생하는 self annealing effect로 결정 크기까지도 조절할 수 있다. 또한 이러한 모든 process가 한 진공 장비 내에서 이루어지므로 장비의 단순화와, 공정간 단계별로 발생하는 불순물과 표면산화를 막을 수 있으므로 절연체 위에 저항이 낮고, hall mobility가 높은 poly-crystalline Ge thin film을 만들 수 있다. 본 연구에서는, 주로 핵 생성과정에서 seed를 만드는 이온주입 조건과, 결정 성장이 일어나는 증착 조건에 따라서 Ge의 결정방향과 크기가 많은 차이를 보이는데, 이는 HR-XRD(High resolution X-ray Diffractometer)와 Raman spectroscopy를 이용하여 측정 하였으며, SEM과 AFM으로 결정의 크기와 표면 거칠기를 측정하였다. 또한 Hall effect measurement를 통해 poly-crystalline thin film 의 저항과 hall mobility를 측정하였다.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2005.07a
• /
• pp.785-789
• /
• 2005

Low temperature deposition of silicon and silicon nitride films by catalytic CVD technique was studied for application to thin film transistors on plastic substrates for flexible AMOLEDs. The substrate temperature initially held at room temperature, and was controlled successfully below $150^{\circ}C$ during the entire deposition process. Amorphous silicon films having good adhesion, good surface morphology and sufficiently low content of atomic hydrogen were obtained and could be successfully crystallized using excimer laser without a prior dehydrogenation step. $SiN_x$ films showed a good refractive index, a high deposition rate, a moderate breakdown field and a dielectric constant. The Cat-CVD silicon and silicon nitride films can be good candidates for fabricating thin films transistors on plastic substrates to drive active-matrix organic light emitting display.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.02a
• /
• pp.151-151
• /
• 2010

In this paper, the electrically properties of nonvolatile memory (NVM) using multi-stacks gate insulators of oxide-nitride-oxynitride (ONOn) and active layer of the low temperature polycrystalline silicon (LTPS) were investigated. From hydrogenated amorphous silicon (a-Si:H), the LTPS thin films with high crystalline fraction of 96% and low surface's roughness of 1.28 nm were fabricated by the metal induced crystallization (MIC) with annealing conditions of $650^{\circ}C$ for 5 hours on glass substrates. The LTPS thin film transistor (TFT) or the NVM obtains a field effect mobility of ($\mu_{FE}$) $10\;cm^2/V{\cdot}s$, threshold voltage ($V_{TH}$) of -3.5V. The results demonstrated that the NVM has a memory window of 1.6 V with a programming and erasing (P/E) voltage of -14 V and 14 V in 1 ms. Moreover, retention properties of the memory was determined exceed 80% after 10 years. Therefore, the LTPS fabricated by the MIC became a potential material for NVM application which employed for the system integration of the panel display.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.02a
• /
• pp.470-470
• /
• 2013

Recently, active materials such as amorphous silicon (a-Si), poly crystalline silicon (poly-Si), transition metal oxide semiconductors (TMO), and organic semiconductors have been demonstrated for flexible electronics. In order to apply flexible devices on the polymer substrates, all layers should require the characteristic of flexibility as well as the low temperature process. Especially, pentacene thin film transistors (TFTs) have been investigated for probable use in low-cost, large-area, flexible electronic applications such as radio frequency identification (RFID) tags, smart cards, display backplane driver circuits, and sensors. Since pentacene TFTs were studied, their electrical characteristics with varying single variable such as strain, humidity, and temperature have been reported by various groups, which must preferentially be performed in the flexible electronics. For example, the channel mobility of pentacene organic TFTs mainly led to change in device performance under mechanical deformation. While some electrical characteristics like carrier mobility and concentration of organic TFTs were significantly changed at the different temperature. However, there is no study concerning multivariable. Devices actually worked in many different kinds of the environment such as thermal, light, mechanical bending, humidity and various gases. For commercialization, not fewer than two variables of mechanism analysis have to be investigated. Analyzing the phenomenon of shifted characteristics under the change of multivariable may be able to be the importance with developing improved dielectric and encapsulation layer materials. In this study, we have fabricated flexible pentacene TFTs on polymer substrates and observed electrical characteristics of pentacene TFTs exposed to tensile and compressive strains at the different values of temperature like room temperature (RT), 40, 50, $60^{\circ}C$. Effects of bending and heating on the device performance of pentacene TFT will be discussed in detail.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.24 no.11
• /
• pp.900-904
• /
• 2011

In this paper, we investigated an anomalous hump phenomenon under the positive bias stress in p-type LTPS TFTs. The devices with inferior electrical performance also show larger hump phenomenon. which can be explained by the sub-channel induced from trapped electrons under thinner gate oxide region. We can confirm that the devices with larger hump have larger interface trap density ($D_{it}$) and grain boundary trap density ($N_{trap}$) extracted by low-high frequency capacitance method and Levinson-Proano method, respectively. From the C-V with I-V transfer characteristics, the trapped electrons causing hump seem to be generated particularly from the S/D and gate overlapped region. Based on these analysis, the major cause of an anomalous hump phenomenon under the positive bias stress in p-type poly-Si TFTs is explained by the GIDL occurring in the S/D and gate overlapped region and the traps existing in the channel edge region where the gate oxide becomes thinner, which can be inferred by the fact that the magnitude of the hump is dependent on the average trap densities.

• Proceedings of the KIEE Conference
• /
• 2009.07a
• /
• pp.1225_1226
• /
• 2009

유리 기판 상에 이중 게이트 절연막을 가지는 우수한 특성의 P형 엑시머 레이저 어닐링 (ELA) 다결정 실리콘 박막 트랜지스터를 제작하였다. 그리고 P형 짧은 채널 ELA 다결정 실리콘 박막 트랜지스터의 오프 상태 스트레스 하에서의 전기적 특성을 분석하였다. 스트레스하에서 긴 채널에서의 문턱 전압은 양의 방향으로 거의 이동하지 않는 (${\Delta}V_{TH}$ = 0.116V) 반면, 짧은 채널 박막 트랜지스터의 문턱 전압은 양의 방향으로 상당히 이동 (${\Delta}V_{TH}$ = 2.718V)하는 것을 확인할 수 있었다. 이런 짧은 채널 박막 트랜지스터에서 문턱 전압의 양의 이동은 다결정 실리콘 막과 게이트 산화막 사이의 계면에서의 전자 트랩핑 때문이다. 또한, 박막 트랜지스터의 누설 전류는 오프 상태 스트레스 하에서의 채널 영역의 홀 전하로 인하여 온 전류 수준을 감소시키지 않고 억제될 수 있었다. C-V 측정 결과는 계면의 전자 트랩핑이 드레인 접합 영역부근에서 발생한다는 것을 나타낸다.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.49 no.10
• /
• pp.111-121
• /
• 2012

In this paper, a poly-Si thin film transistor with ${\sim}0.5{\mu}m$ gate length was fabricated and its electrical characteristics are optimized. From the results, it was verified that making active region with larger grain size using low temperature annealing is an efficient way to enhance the subthreshold swing, drain-induced barrier lowering and on-current characteristics. A SONOS flash memory was fabricated using this poly-Si channel process and its performances are analyzed. It was necessary to optimize O/N/O thickness for the reduction of electron back tunneling and the enhancement of its memory operation. The optimized device showed 2.24 V of threshold voltage memory windows which coincided with a well operating flash memory.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2003.07a
• /
• pp.7-10
• /
• 2003

Samsung SDI has developed a full color 5.0" WVGA AMOLED display with top emission and a super fine pitch of 0.1365mm(l86ppi), the world's highest resolution OLED display ever reported to date. Scan driver circuits and demux circuit were integrated into the display panel, using low temperature poly-Si TFT CMOS technology, and data driver circuit were mounted using COG chips. Peak luminescence was greater than 300cd/ $m^2$ with power consumption of 500mW with 30% of the pixels on illuminated.

• Broadcasting and Media Magazine
• /
• v.11 no.4
• /
• pp.104-117
• /
• 2006

In this Paper, we analyze the application of Interactive Data Broadcasting in DMB(Digital Multimedia Broadcasting) in the accordance with convergence of service and technology. With the acceleration of digital convergence in the Ubiquitous period substantial development of digital media technology and convergence of broadcasting and telecommunication industry are being witnessed. Consequently these results gave rise to newly combined-products such as DMB(Digital Multimedia Broadcasting), WCDMA(Wide-band code division multiple access), Wibro(Wireless Broadband Internet), IP-TV (Internet protocol TV) and HSDPA(High speed downlink packet access). The preparatory stage for the implementation of Interactive Data Broadcasting Service will be reached by the end of December, 2006. DMB is the first result of a successful convergence service between Broadcasting and Telecommunication in new media era. Multimedia technology and services are the core elements of DMB. The Data Broadcasting will not only offer various services of interactive information such News, Weather, Broadcasting Program etc, but also be linked with characteristic function of mobile phone such as calling and SMS(Short Message Service) via Return Channel.