• 제어로봇시스템학회논문지
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• 제5권1호
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• pp.11-15
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• 1999

In this paper, a robust pole placement controller for time invariant linear systems with polytopic uncertainties is presented. The proposed controller is a fixed order output feedback controller which stabilizes the uncertain systems and satisfies the constraints on the closed-loop pole location. The proposed controller can be obtained by minimizing a certain nonlinear object function subject to linear matrix inequality constraints. An algorithm for solving the nonlinear optimization problem is also proposed.

• 한국컴퓨터정보학회논문지
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• 제21권2호
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• pp.97-103
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• 2016

This paper deals with the cycle time minimization problem that determines the productivity in printed circuit board (PCB) with n components using the m placement machines. This is known as production cycle time determination problem (PCTDP). The polynomial time algorithm to be obtain the optimal solution has been unknown yet, therefore this hard problem classified by NP-complete. This paper gets the initial assignment result with the machine has minimum unit placement time per each component firstly. Then, the balancing process with reallocation from overhead machine to underhead machine. Finally, we perform the swap optimization and get the optimal solution of cycle time $T^*$ within O(mn) computational complexity. For experimental data, the proposed algorithm can be obtain the same result as integer programming+branch-and-bound (IP+B&B) and B&B.

• 한국소음진동공학회논문집
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• 제14권9호
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• pp.819-826
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• 2004

A multi-step optimum strategy for the selection of the locations and directions of strain gauges is proposed in this paper to capture at best the modal response of blade in a series of modes on fan blades. It is consist of three steps including two pass reduction step, genetic algorithm and fine optimization to find the locations-directions of strain gauges. The optimization is based upon the maximum signal-to-noise ratio(SNR) of measured strain values with respect to the inherent system measurement noise, the mispositioning of the gauge in location and gauge failure. Optimal gauge positions for a fan blade is analyzed to prove the effectiveness of the multi-step optimum methodology and to investigate the effects of the considering parameters such as the mispositioning level, the probability of gauge failure, and the number of gauges on the optimal strain gauge position.

• Structural Engineering and Mechanics
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• 제18권2호
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• pp.137-150
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• 2004

The optimization of active bars' placement and feedback gains of closed loop control system for random intelligent truss structures under non-stationary random excitation is presented. Firstly, the optimal mathematical model with the reliability constraints on the mean square value of structural dynamic displacement and stress response are built based on the maximization of dissipation energy due to control action. In which not only the randomness of the physics parameters of structural materials, geometric dimensions and structural damping are considered simultaneously, but also the applied force are considered as non-stationary random excitation. Then, the numerical characteristics of the stationary random responses of random intelligent structure are developed. Finally, the rationality and validity of the presented model are demonstrated by an engineering example and some useful conclusions are obtained.

• International Journal of Control, Automation, and Systems
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• 제5권2호
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• pp.192-199
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• 2007

This paper proposes a new printed circuit board (PCB) assembly planning method for multi-head surface mounters. We present an integer programming formulation for the optimization problem, and propose a heuristic method to solve the large NP-complete problem within a reasonable time. A dynamic programming technique is then applied to the feeder arrangement optimization and placement sequence optimization to reduce the overall assembly time. Comparative simulation results are finally presented to verify the usefulness of the proposed method.

• 한국군사과학기술학회지
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• 제15권5호
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• pp.630-634
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• 2012

It is very important to place receiver in multistatic sonar. Inefficient placement of the receiver reduce detection probability and to increase the probability of detection should be used more receivers. Therefore, detection of targets in searching area, detection performance of limited receiver depends on how to place. Through the optimized receiver placement, detection area between each sonar as much as possible avoid duplication, as optimization, the minimum receiver can be maintained detection performance. In this paper we prove mathematical verification of maximum signal excess value based on sonar placement and we calculate a signal excess value by using computer simulations and suggest optimal sonar placement.

• 전자공학회논문지
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• 제49권12호
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• pp.209-218
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• 2012

최근 무어의 법칙을 연장시킬 시스템 집적 기술로서 Field Programmable Stateful Logic Array (FPSLA)가 제안되었다. 본 논문은 FPSLA의 설계 자동화 절차를 확립하고 논리 합성, 동기화, 물리적 매핑, 자동 배치 등의 접근 방법을 최초로 제시한다. 특히, 동기화를 통해 배치를 1차원 문제로 축소한 후 비선형 최적화 기법을 개량한 개략 배치 모델 및 하향식 계층적 2분법을 이용한 배치 적법화 알고리즘을 제안하였다. 또한, 제안된 모델 및 알고리즘을 소프트웨어로 구현하여 ACM/SIGDA 벤치 마크 예제에 적용함으로써 그 유효성을 입증하였다. 이 소프트웨어에는 Fanout 수만큼 출력 상태를 같은 단의 멤리스터성 스위치에 복사해야 하는 FPSLA의 특성을 고려하여 최적화 단계 별로 넷을 하이퍼에지로 통합했다가 다시 에지로 분리하는 기법이 제안되었으며 약 18.4%의 추가적 최적화를 이룩했다. FPSLA의 출력 상태 복사는 논리 단 일부에 셀 밀도가 집중되는 문제를 노출했으며 단위 논리 게이트의 Fanin을 제한하는 기법으로 18.5% 감소 효과를 얻었다. FPSLA의 실용성 확보를 위해서는 우선 논리 합성 시 Fanin의 수가 일부 단에 집중되지 않도록 제약하는 방안을 개발하여야 한다. 또한, FPSLA 패브릭 구조를 이식하기 위해 대칭성이 감소된 나노와이어 크로스바가 형성하는 복잡한 그래프 상에서 수행되어야 하는 자동 배선의 효율성 연구도 필요하다. 이러한 툴 개발은 설계 자동화 자체뿐만 아니라 FPSLA의 패브릭 구조 개선에 필요한 실험에 유용한 평가 도구로서도 큰 역할을 할 것이다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제15권11호
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• pp.3892-3912
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• 2021

The recent rapid growth of mobile network traffic places multi-access edge computing in an important position to reduce network load and improve network capacity and service quality. Contrasting with traditional mobile cloud computing, multi-access edge computing includes a base station cooperative cache layer and user cooperative cache layer. Selecting the most appropriate cache content according to actual needs and determining the most appropriate location to optimize the cache performance have emerged as serious issues in multi-access edge computing that must be solved urgently. For this reason, a cache placement algorithm based on comprehensive utility in big data multi-access edge computing (CPBCU) is proposed in this work. Firstly, the cache value generated by cache placement is calculated using the cache capacity, data popularity, and node replacement rate. Secondly, the cache placement problem is then modeled according to the cache value, data object acquisition, and replacement cost. The cache placement model is then transformed into a combinatorial optimization problem and the cache objects are placed on the appropriate data nodes using tabu search algorithm. Finally, to verify the feasibility and effectiveness of the algorithm, a multi-access edge computing experimental environment is built. Experimental results show that CPBCU provides a significant improvement in cache service rate, data response time, and replacement number compared with other cache placement algorithms.

• 대한전자공학회논문지
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• 제24권6호
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• pp.1056-1067
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• 1987

This paper presents a design procedure for building block integrated circuits that is based on the digraph relaxation model. A set of optimization procedure is prosented for a minimum area and routing-fecsible placement of IC building blocks. Chip area optimization is subject to perimeter and area constraints on the component rectangles in the dissection.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.529-532
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• 1988

This paper proposes a graph matching algorithm based on simulated annealing, which assures the globally optimal solution for circuit partitioning for the placement in the rectilinear region occurring as a result of the pre-placement of some macro cells, or onto the nonplanar surface in some military or space applications. The circuit graph ($G_{C}$) denoting the circuit topology is formed by a hierarchical bottom-up clustering of cells, while another graph called region graph ($G_{R}$) represents the geometry of a planar rectilinear region or a nonplanar surface for circuit placement. Finding the optimal many-to-one vertex mapping function from $G_{C}$ to $G_{R}$, such that the total mismatch cost between two graphs is minimal, is a combinatorial optimization problem which was solved in this work for various examples using simulated annealing.