• Title/Summary/Keyword: photolithography

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Fabrication of Two-dimensional MoS2 Films-based Field Effect Transistor for High Mobility Electronic Device Application

  • Joung, DaeHwa;Park, Hyeji;Mun, Jihun;Park, Jonghoo;Kang, Sang-Woo;Kim, TaeWan
    • Applied Science and Convergence Technology
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    • v.26 no.5
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    • pp.110-113
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    • 2017
  • The two-dimensional layered $MoS_2$ has high mobility and excellent optical properties, and there has been much research on the methods for using this for next generation electronics. $MoS_2$ is similar to graphene in that there is comparatively weak bonding through Van der Waals covalent bonding in the substrate-$MoS_2$ and $MoS_2-MoS_2$ heteromaterial as well in the layer-by-layer structure. So, on the monatomic level, $MoS_2$ can easily be exfoliated physically or chemically. During the $MoS_2$ field-effect transistor fabrication process of photolithography, when using water, the water infiltrates into the substrate-$MoS_2$ gap, and leads to the problem of a rapid decline in the material's yield. To solve this problem, an epoxy-based, as opposed to a water-based photoresist, was used in the photolithography process. In this research, a hydrophobic $MoS_2$ field effect transistor (FET) was fabricated on a hydrophilic $SiO_2$ substrate via chemical vapor deposition CVD. To solve the problem of $MoS_2$ exfoliation that occurs in water-based photolithography, a PPMA sacrificial layer and SU-8 2002 were used, and a $MoS_2$ film FET was successfully created. To minimize Ohmic contact resistance, rapid thermal annealing was used, and then electronic properties were measured.

Effects of DI Rinse and Oxide HF Wet Etch Processes on Silicon Substrate During Photolithography (반도체 노광 공정의 DI 세정과 Oxide의 HF 식각 과정이 실리콘 표면에 미치는 영향)

  • Baik, Jeong-Heon;Choi, Sun-Gyu;Park, Hyung-Ho
    • Korean Journal of Materials Research
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    • v.20 no.8
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    • pp.423-428
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    • 2010
  • This study shows the effects of deionized (DI) rinse and oxide HF wet etch processes on silicon substrate during a photolithography process. We found a fail at the wafer center after DI rinse step, called Si pits, during the fabrication of a complementary metal-oxide-semiconductor (CMOS) device. We tried to find out the mechanism of the Si pits by using the silicon wafer on CMOS fabrication and analyzing the effects of the friction charge induced by the DI rinsing. The key parameters of this experiment were revolution per minute (rpm) and time. An incubation time of above 10 sec was observed for the formation of Si pits and the rinsing time was more effective than rpm on the formation of the Si pits. The formation mechanism of the Si pits and optimized rinsing process parameters were investigated by measuring the charging level using a plasma density monitor. The DI rinse could affect the oxide substrate by a friction charging phenomenon on the photolithography process. Si pits were found to be formed on the micro structural defective site on the Si substrate under acceleration by developed and accumulated charges during DI rinsing. The optimum process conditions of DI rinse time and rpm could be established through a systematic study of various rinsing conditions.

Uniformity Improvement of Micromirror Array for Reliable Working Performance as an Optical Modulator in the Maskless Photolithography System

  • Lee, Kook-Nyung;Kim, Yong-Kweon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.1 no.2
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    • pp.132-139
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    • 2001
  • We considered the uniformity of fabricated micromirror arrays by characterizing the fabrication process and calculating the appropriate driving voltages of micromirrors used as virtual photomask in maskless photolithography. The uniformity of the micromirror array in terms of driving voltage and optical characteristics is adversely affected by factors, such as the air gap between the bottom electrode and the mirror plate, the spring shape and the deformation of the mirror plate or torsion spring. The thickness deviation of the photoresist sacrificial layer, the misalignment between mirror plate and bottom electrode, the aluminum deposition condition used to produce the spring and the mirror plate, and initial mirror deflection were identified as key factors. Their importance lies in the fact that they are related to air gap deviations under the mirror plate, asymmetric driving voltages in left and right mirror directions, and the deformation of the Al sring or mirror plate after removal of the sacrificial layer. The plasma ashing conditions used for removing the sacrificial layer also contributed to the deformation of the mirror plate and spring. Driving voltages were calculated for the pixel operation of the micromirror array, and the non-uniform characteristics of fabricated micromirrors were taken into consideration to improve driving performance reliability.

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Research on the WIP-based Dispatching Rules for Photolithography Area in Wafer Fabrication Industries

  • Lin, Yu-Hsin;Tsai, Chih-Hung;Lee, Ching-En;Chiu, Chung-Ching
    • International Journal of Quality Innovation
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    • v.8 no.2
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    • pp.132-146
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    • 2007
  • Constructing an effective production control policy is the most important issue in wafer fabrication factories. Most of researches focus on the input regulations of wafer fabrication. Although many of these policies have been proven to be effective for wafer fabrication manufacturing, in practical, there is a need to help operators decide which lots should be pulled in the right time and to develop a systematic way to alleviate the long queues at the bottleneck workstation. The purpose of this study is to construct a photolithography workstation dispatching rule (PADR). This dispatching rule considers several characteristics of wafer fabrication and influential factors. Then utilize the weights and threshold values to design a hierarchical priority rule. A simulation model is also constructed to demonstrate the effect of the PADR dispatching rule. The PADR performs better in throughput, yield rate, and mean cycle time than FIFO (First-In-First-Out) and SPT (Shortest Process Time).

Fabrication of PDMS Lens Using Photolithography and Water Droplet Mold (사진식각공정과 물방울 형틀을 이용한 PDMS 렌즈 제작)

  • Kim, Jin Young;Sung, Jungwoo;Cho, Seong J.;Kim, Chulhong;Lim, Geunbae
    • Journal of Sensor Science and Technology
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    • v.22 no.5
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    • pp.352-356
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    • 2013
  • We developed a novel fabrication method of polydimethylsioxane (PDMS) lens, which can easily control the shapes of the lens using soft lithography with common photolithography and water droplet molding. A mold for PDMS lens was prepared by patterning of hydrophobic photoresist on the hydrophilic substrate and dispensing small water droplets onto the predefined hydrophilic patterns. The size of patterns determined the dimension of the lens and the dispensed volume of the water droplet decided the radius of curvature of the PDMS lens independently. The water droplet with photoresist pattern played a robustly fixed mold for lens due to difference in wettability. The radius of curvature could be calculated theoretically because the water droplets could approximate spherical cap on the substrate. Finally, concave and convex PDMS lenses which could reduce or magnify optically were fabricated by curing of PDMS on the prepared mold. The measured radii of the fabricated PDMS lenses were well matched with the estimated values. We believe that our simple and efficient fabrication method can be adopted to PDMS microlens and extended to micro optical device, lab on a chip, and sensor technology.

Striation of coated conductors by photolithography process

  • Byeong-Joo Kim;Miyeon Yoon;Myeonghee Lee;Sang Ho Park;Ji-Kwang Lee;Kyeongdal Choi;Woo-Seok Kim
    • Progress in Superconductivity and Cryogenics
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    • v.25 no.4
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    • pp.50-53
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    • 2023
  • In this study, the photolithography process was chosen to reduce the aspect ratio of the cross-section of a high-temperature superconducting (HTS) tape by dividing the superconducting layer of the tape. Reducing the aspect ratio decreases the magnetization losses in the second-generation HTS tapes generated by AC magnetic fields. The HTS tape used in the experiment has a thin silver (Ag) layer of about 2 ㎛ on top of the REBCO superconducting layer and no additional stabilizer layer. A dry film resist (DFR) was laminated on top of the HTS tape by a lamination method for the segmentation. Exposure to a 395 nm UV lamp on a patterned mask cures the DFR. Dipping with a 1% Na2CO3 solution was followed to develop the uncured film side and to obtain the required pattern. The silver and superconducting layers of the REBCO films were cleaned with an acid solution after the etching. Finally, the segmented HTS tape was completed by stripping the DFR film with acetone.

Measurement of Width and Step-Height of Photolithographic Product Patterns by Using Digital Holography (디지털 홀로그래피를 이용한 포토리소그래피 공정 제품 패터닝의 폭과 단차 측정)

  • Shin, Ju Yeop;Kang, Sung Hoon;Ma, Hye Joon;Kwon, Ik Hwan;Yang, Seung Pil;Jung, Hyun Chul;Hong, Chung Ki;Kim, Kyeong Suk
    • Journal of the Korean Society for Nondestructive Testing
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    • v.36 no.1
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    • pp.18-26
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    • 2016
  • The semiconductor industry is one of the key industries of Korea, which has continued growing at a steady annual growth rate. Important technology for the semiconductor industry is high integration of devices. This is to increase the memory capacity for unit area, of which key is photolithography. The photolithography refers to a technique for printing the shadow of light lit on the mask surface on to wafer, which is the most important process in a semiconductor manufacturing process. In this study, the width and step-height of wafers patterned through this process were measured to ensure uniformity. The widths and inter-plate heights of the specimens patterned using photolithography were measured using transmissive digital holography. A transmissive digital holographic interferometer was configured, and nine arbitrary points were set on the specimens as measured points. The measurement of each point was compared with the measurements performed using a commercial device called scanning electron microscope (SEM) and Alpha Step. Transmission digital holography requires a short measurement time, which is an advantage compared to other techniques. Furthermore, it uses magnification lenses, allowing the flexibility of changing between high and low magnifications. The test results confirmed that transmissive digital holography is a useful technique for measuring patterns printed using photolithography.

Experimental Study on Micro-Scale Surface Texturing for Friction Reduction (저마찰을 위한 Micro-Scale Surface Texturing의 실험적 연구)

  • 채영훈
    • Tribology and Lubricants
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    • v.20 no.5
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    • pp.266-271
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    • 2004
  • The aim of this paper is to investigate the effect of surface texturing on reduction friction and to understand the potential of friction reduction through micro-scale dimple to fabricate by photolithography on pin-on-disk test using flat-on-flat contact geometry. It was verify that the friction property with respect to the same pitch has been influence on the size of dimple under lubricated sliding contact. Also, we can recognize from Stribeck curve that the friction property has a connection with the size of dimple. It can explain a relationship between the friction coefficient and a dimensionless parameter for lubrication condition. The friction property has been an effect on the size of surface texture on reduction friction, not only because the density of dimple, but also because the ratio of diameter/pitch. This ratio of approximately 0.5 recommend under the tested friction condition. It suggested that the ratio of d/p is an important parameter for surface texture design.