• Applied Science and Convergence Technology
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• 제26권5호
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• pp.110-113
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• 2017

The two-dimensional layered $MoS_2$ has high mobility and excellent optical properties, and there has been much research on the methods for using this for next generation electronics. $MoS_2$ is similar to graphene in that there is comparatively weak bonding through Van der Waals covalent bonding in the substrate-$MoS_2$ and $MoS_2-MoS_2$ heteromaterial as well in the layer-by-layer structure. So, on the monatomic level, $MoS_2$ can easily be exfoliated physically or chemically. During the $MoS_2$ field-effect transistor fabrication process of photolithography, when using water, the water infiltrates into the substrate-$MoS_2$ gap, and leads to the problem of a rapid decline in the material's yield. To solve this problem, an epoxy-based, as opposed to a water-based photoresist, was used in the photolithography process. In this research, a hydrophobic $MoS_2$ field effect transistor (FET) was fabricated on a hydrophilic $SiO_2$ substrate via chemical vapor deposition CVD. To solve the problem of $MoS_2$ exfoliation that occurs in water-based photolithography, a PPMA sacrificial layer and SU-8 2002 were used, and a $MoS_2$ film FET was successfully created. To minimize Ohmic contact resistance, rapid thermal annealing was used, and then electronic properties were measured.

• 한국재료학회지
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• 제20권8호
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• pp.423-428
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• 2010

This study shows the effects of deionized (DI) rinse and oxide HF wet etch processes on silicon substrate during a photolithography process. We found a fail at the wafer center after DI rinse step, called Si pits, during the fabrication of a complementary metal-oxide-semiconductor (CMOS) device. We tried to find out the mechanism of the Si pits by using the silicon wafer on CMOS fabrication and analyzing the effects of the friction charge induced by the DI rinsing. The key parameters of this experiment were revolution per minute (rpm) and time. An incubation time of above 10 sec was observed for the formation of Si pits and the rinsing time was more effective than rpm on the formation of the Si pits. The formation mechanism of the Si pits and optimized rinsing process parameters were investigated by measuring the charging level using a plasma density monitor. The DI rinse could affect the oxide substrate by a friction charging phenomenon on the photolithography process. Si pits were found to be formed on the micro structural defective site on the Si substrate under acceleration by developed and accumulated charges during DI rinsing. The optimum process conditions of DI rinse time and rpm could be established through a systematic study of various rinsing conditions.

• JSTS:Journal of Semiconductor Technology and Science
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• 제1권2호
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• pp.132-139
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• 2001

We considered the uniformity of fabricated micromirror arrays by characterizing the fabrication process and calculating the appropriate driving voltages of micromirrors used as virtual photomask in maskless photolithography. The uniformity of the micromirror array in terms of driving voltage and optical characteristics is adversely affected by factors, such as the air gap between the bottom electrode and the mirror plate, the spring shape and the deformation of the mirror plate or torsion spring. The thickness deviation of the photoresist sacrificial layer, the misalignment between mirror plate and bottom electrode, the aluminum deposition condition used to produce the spring and the mirror plate, and initial mirror deflection were identified as key factors. Their importance lies in the fact that they are related to air gap deviations under the mirror plate, asymmetric driving voltages in left and right mirror directions, and the deformation of the Al sring or mirror plate after removal of the sacrificial layer. The plasma ashing conditions used for removing the sacrificial layer also contributed to the deformation of the mirror plate and spring. Driving voltages were calculated for the pixel operation of the micromirror array, and the non-uniform characteristics of fabricated micromirrors were taken into consideration to improve driving performance reliability.

• International Journal of Quality Innovation
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• 제8권2호
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• pp.132-146
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• 2007

Constructing an effective production control policy is the most important issue in wafer fabrication factories. Most of researches focus on the input regulations of wafer fabrication. Although many of these policies have been proven to be effective for wafer fabrication manufacturing, in practical, there is a need to help operators decide which lots should be pulled in the right time and to develop a systematic way to alleviate the long queues at the bottleneck workstation. The purpose of this study is to construct a photolithography workstation dispatching rule (PADR). This dispatching rule considers several characteristics of wafer fabrication and influential factors. Then utilize the weights and threshold values to design a hierarchical priority rule. A simulation model is also constructed to demonstrate the effect of the PADR dispatching rule. The PADR performs better in throughput, yield rate, and mean cycle time than FIFO (First-In-First-Out) and SPT (Shortest Process Time).

• 센서학회지
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• 제22권5호
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• pp.352-356
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• 2013

We developed a novel fabrication method of polydimethylsioxane (PDMS) lens, which can easily control the shapes of the lens using soft lithography with common photolithography and water droplet molding. A mold for PDMS lens was prepared by patterning of hydrophobic photoresist on the hydrophilic substrate and dispensing small water droplets onto the predefined hydrophilic patterns. The size of patterns determined the dimension of the lens and the dispensed volume of the water droplet decided the radius of curvature of the PDMS lens independently. The water droplet with photoresist pattern played a robustly fixed mold for lens due to difference in wettability. The radius of curvature could be calculated theoretically because the water droplets could approximate spherical cap on the substrate. Finally, concave and convex PDMS lenses which could reduce or magnify optically were fabricated by curing of PDMS on the prepared mold. The measured radii of the fabricated PDMS lenses were well matched with the estimated values. We believe that our simple and efficient fabrication method can be adopted to PDMS microlens and extended to micro optical device, lab on a chip, and sensor technology.

• 한국초전도ㆍ저온공학회논문지
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• 제25권4호
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• pp.50-53
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• 2023

In this study, the photolithography process was chosen to reduce the aspect ratio of the cross-section of a high-temperature superconducting (HTS) tape by dividing the superconducting layer of the tape. Reducing the aspect ratio decreases the magnetization losses in the second-generation HTS tapes generated by AC magnetic fields. The HTS tape used in the experiment has a thin silver (Ag) layer of about 2 ㎛ on top of the REBCO superconducting layer and no additional stabilizer layer. A dry film resist (DFR) was laminated on top of the HTS tape by a lamination method for the segmentation. Exposure to a 395 nm UV lamp on a patterned mask cures the DFR. Dipping with a 1% Na₂CO₃ solution was followed to develop the uncured film side and to obtain the required pattern. The silver and superconducting layers of the REBCO films were cleaned with an acid solution after the etching. Finally, the segmented HTS tape was completed by stripping the DFR film with acetone.

• 비파괴검사학회지
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• 제36권1호
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• pp.18-26
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• 2016

반도체 산업은 우리나라 주력산업중 하나로 매년 꾸준한 성장세를 보이며 지속적인 성장을 하고 있다. 이러한 반도체 산업에서의 중요한 기술은 소자의 고 집적화이다. 이는 면적당 메모리 용량을 증가시키는 것으로 핵심역할을 하는 것이 바로 포토리소그래피 기술이다. 포토리소그래피란 마스크의 표면에 빛을 쬐어 생기는 그림자를 웨이퍼 상에 인쇄하는 기술이며 반도체 제조공정에서의 가장 중요한 공정이다. 이러한 공정을 통해 나온 패터닝을 분석 시에 폭과 단차의 균일성을 측정한다. 이에 따라 본 논문은 포토리소그래피 공정이 적용된 시험편 패터닝에 폭과 판 사이와의 단차를 투과형 디지털 홀로그래피를 구성하여 측정하고자 한다. 투과형 디지털 홀로그래피 간섭계를 구성하고 시험편에 임의의 9포인트를 설정하여 각 포인트를 측정하고 상용장비인 SEM (scanning electron microscopy)과 alpha step으로 측정한 결과와 비교하고자 한다. 투과형 디지털 홀로그래피는 측정시간이 타 기법에 비에 짧다는 장점과 배율렌즈를 사용하기 때문에 저 배율에서 고 배율로 변경하여 측정할 수 있는 장점을 가지고 있다. 실험 결과로부터 투과형 디지털 홀로그래피가 포토 리소그래피가 적용된 패터닝 측정에 유용한 기술임을 확인할 수 있었다.

• 한국경영과학회:학술대회논문집
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• 대한산업공학회/한국경영과학회 1996년도 춘계공동학술대회논문집; 공군사관학교, 청주; 26-27 Apr. 1996
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• pp.565-565
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• 1996

• 한국광과학회:학술대회논문집
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• 한국광과학회 1995년도 학술대회지
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• pp.12-12
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• 1995

• Tribology and Lubricants
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• 제20권5호
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• pp.266-271
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• 2004

The aim of this paper is to investigate the effect of surface texturing on reduction friction and to understand the potential of friction reduction through micro-scale dimple to fabricate by photolithography on pin-on-disk test using flat-on-flat contact geometry. It was verify that the friction property with respect to the same pitch has been influence on the size of dimple under lubricated sliding contact. Also, we can recognize from Stribeck curve that the friction property has a connection with the size of dimple. It can explain a relationship between the friction coefficient and a dimensionless parameter for lubrication condition. The friction property has been an effect on the size of surface texture on reduction friction, not only because the density of dimple, but also because the ratio of diameter/pitch. This ratio of approximately 0.5 recommend under the tested friction condition. It suggested that the ratio of d/p is an important parameter for surface texture design.