• Title/Summary/Keyword: photo leakage current

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Fabrication of TaOx Thin Film on Si-Substrate by Photo-CVD Method (광화학기상성장법에 의한 Si 기판상에서의 TaO$_{x}$ 박막 제작에 관한 연구)

  • 한봉명;김수용;김경식
    • Journal of the Korean institute of surface engineering
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    • v.25 no.3
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    • pp.126-132
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    • 1992
  • Recent VLSI requires materials with high dielectric constant in order to reduce their storage capacitor areas. Thin TaOx film was formed from Ta(OCH3)5 by photo-CVD method at a low temperature. The result shows that the film obtained by photo-CVD method is this study has good step coverage, high dielectric constant (20-25) and low leakage current. The high strong peaks from Ta(4f), Ta(4d), and O(ls) levels were observed by XPS analysis. From the diffraction pattern and TEM prcture analysis, the TaOx thin film was observed to be amorphous. This kind of the deposition method could be considered to be a very promising method applied to VLSI.

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Poly-Si Thin Film Transistor with poly-Si/a-Si Double Active Layer Fabricated by Employing Native Oxide and Excimer Laser Annealing (자연 산화막과 엑시머 레이저를 이용한 Poly-Si/a-Si 이중 박막 다결정 실리콘 박막 트랜지스터)

  • Park, Gi-Chan;Park, Jin-U;Jeong, Sang-Hun;Han, Min-Gu
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.1
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    • pp.24-29
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    • 2000
  • We propose a simple method to control the crystallization depth of amorphous silicon (a-Si) deposited by PECVD or LPCVD during the excimer laser annealing (ELA). Employing the new method, we have formed poly-Si/a-Si double film and fabricated a new poly-Si TFT with vertical a-Si offsets between the poly-Si channel and the source/drain of TFT without any additional photo-lithography process. The maximum leakage current of the new poly-Si TFT decreased about 80% due to the highly resistive vertical a-Si offsets which reduce the peak electric field in drain depletion region and suppress electron-hole pair generation. In ON state, current flows spreading down through broad a-Si cross-section in the vertical a-Si offsets and the current density in the drain depletion region where large electric field is applied is reduced. The stability of poly-Si TFT has been improved noticeably by suppressing trap state generation in drain region which is caused by high current density and large electric field. For example, ON current of the new TFT decreased only 7% at a stress condition where ON current of conventional TFT decreased 89%.

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Modeling for UV Photo-detector with Pt/AIGaN Schottky diode (Pt/AIGaN 쇼트키 다이오드의 수광특성 모델링)

  • Kim Jong-Hwan;Lee Heon-Bok;Park Sung-Jong;Lee Jung-Hee;Hahm Sung-Ho
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.605-608
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    • 2004
  • A $Pt/Al_xGa_{l-x}N$ Schottky type Ultra-violet photodetector was modeled and simulated using the commercial SILVACO software program. In the carrier transport, we applied field model and other analytic model to determine the electron saturation velocity and low field mobility for GaN and $Al_xGa_{l-x}N$. A C-Interpreter function was defined to described the mole-fraction for the ternary compound semiconductor such as $Al_xGa_{l-x}N$. As comparing the simulated and experimental results, we found that the simulated result for type-1 has $15.9 nA/cm^2$ of leakage current at 5V. We confirmed a good agreement of photo-current in the UV Photo-detector, while applying the absorption coefficient and reflective index of active $Al_xGa_{l-x}N$ and other layers. There had been an intensive search for the proper refractive indices of the layers.

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Transparent Sol-Gel Hybrid Dielectric Material Coatings for Low k Passivation Layer

  • Yang, Seung-Cheol;Oh, Ji-Hoon;Kwak, Seung-Yeon;Bae, Byeong-Soo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.1453-1456
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    • 2009
  • Transparent sol-gel hybrid dielectric material (hybrimer) coating films were fabricated by spin coating and photo or thermal curing of sol-gel derived oligosiloxane resins. Hybrimer coating films are suitable as the passivation layer of TFT in AMLCD due to low dielectric constant, small loss tangent, low leakage current density, high transmittance and thermal stability.

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The X-ray Detection and morphology Characteristics on Evaporation Temperature of amorphous Selenium based digital X-ray detector (비정질 셀레늄의 박막 제조공정에 따른 미세구조와 IV특성)

  • Gong, H.G.;Cha, B.Y.;Lee, G.H.;Kim, J.H.;Nam, S.H.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.05b
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    • pp.51-54
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    • 2002
  • Recently, due to its better photosensitivity in X-ray, the amorphous selenium based photoreceptor is used on digital direct method conversion material. Compared to other photoconductive material, amorphous selenium has good X-ray response characteristic and low leakage current. It has many parameters of detecting X-ray response on selenium. Among of them, it is well known that manufacture of a-Se is the most basic element. In this paper, we fabricated two types of amorphous selenium sample which had time variable. The one was fabricated continuous deposition sample and the other was step by step sample. Thickness of sample was $300{\mu}m$ and top electrode was evaporated gold. We investigated the leakage current and photo current of them and analysed their electrical characteristics. For analyzing morphology of samples, SEM and surface was pictured. We found that step by step deposition method could be applied for novel fabricating amorphous selenium film.

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The characteristic study of hybrid X-ray detector using CdTe and Zns:AgCl phosphor (CdTe 와 ZnS:AgCl phosphor를 이용한 Hybrid형 X선 검출기의 특성연구)

  • Seok, Dae-Woo;Kang, Sang-Sik;Kim, Jin-Young;Park, Ji-Koon;Mun, Chi-Woong;Nam, Sang-Hee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05c
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    • pp.71-74
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    • 2003
  • Photoconductor for direct detection fiat-panel imager present a great materials challenge, since their requirement include high X-ray absorption, ionization and charge collection, low leakage current and large area deposition, CdTe is practical material. We report studies of detector sensitivity, That is an CdTe with $5{\mu}m$ thickness on glass. That is hybrid layer of depositting ZnS:AgCl phosphor with $100{\mu}m$ on CdTe. The leakage current of hybrid is similar to it of a-Se, but photocurrent is larger than a-Se. Both of them have high spatial resolution, but hybrid has higher sensitivity than a-Se at comparable bias voltage.

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Risk Assessment of Semiconductor PR Process based on Frequency Analysis of Flammable Material Leakage (반도체 PR 공정의 인화성 물질 누출 빈도분석을 통한 위험성 평가)

  • Park, Myeongnam;Chun, Kwang-Su;Yi, Jinseok;Shin, Dongil
    • Journal of the Korean Institute of Gas
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    • v.25 no.5
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    • pp.1-10
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    • 2021
  • Semiconductor Photo Resist (PR) automation equipment uses a mixture of several flammable substances, and when it leaks during the process, it can lead to various accidents, therefore, risk assessment is necessary. This study analyzed the frequency of leakage of Acetone and PGMEA used in PR automation equipment and the frequency at which such leakage could lead to a fire accident through the frequency analysis method, and evaluated the need for additional risk reduction measures in the current facility. Based on the process leak data and ignition probability data of IOGP, leak frequency analysis and ignition probability were derived, and the frequency of actual fire accidents was analyzed by combining them. The frequency of material leakage in semiconductor PR process is 7.30E-03/year, and fire accidents can occur by acetone that exists above the flash point when the material is leaked, the frequency was calculated at the level of 1.24E-05/year. According to the UK HSE, for a major accident occurring with a frequency of 1.24E-05/year, it is defined as "Broadly Acceptable", a level that does not require additional measures for risk reduction when it causes 7 or less deaths, and due to the process operated by two people, no additional risk reduction are required.

Analysis of Leakage Current of a Laser Diode by Equivalent Circuit Model (등가회로 모델에 의한 레이저다이오드의 누설전류 해석)

  • Choi, Young-Kyu;Kim, Ki-Rae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.2
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    • pp.330-336
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    • 2007
  • A single pixel photon counting type image sensor which is applicable for medical diagnosis with digitally obtained image and industrial purpose has tern designed with $0.18{\mu}m$ triple-well CMOS process. The designed single pixel for readout chip is able to be operated by single supply voltage to simplify digital X-ray image sensor module and a preamplifier which is consist of folded cascode CMOS operational amplifier has been designed to enlarge signal voltage(${\Delta}Vs$), the output voltage of preamplifier. And an externally tunable threshold voltage generator circuit which generates threshold voltage in the readout chip has been newly proposed against the conventional external threshold voltage supply. In addition, A dark current compensation circuit for reducing dark current noise from photo diode is proposed and 15bit LFSR(Linear Feedback Shift Resister) Counter which is able to have high counting frequency and small layout area is designed.

Fabrication and characterization of silicon field emitter array with double gate dielectric (이중 게이트 절연막을 가지는 실리콘 전계방출 어레이 제작 및 특성)

  • 이진호;강성원;송윤호;박종문;조경의;이상윤;유형준
    • Journal of the Korean Vacuum Society
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    • v.6 no.2
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    • pp.103-108
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    • 1997
  • Silicon field emitter arrays (FEAs) have been fabricated by a novel method employing a two-step tip etch and a spin-on-glass (SOG) etch-back process using double layered thermal/tetraethylortho-silicate (TEOS) oxides as a gate dielectric. A partial etching was performed by coating a low viscous photo resist and $O_2$ plasma ashing on order to form the double layered gate dielectric. A small gate aperture with low gate leakage current was obtained by the novel process. The hight and the end radius of the fabricated emitter was about 1.1 $\mu\textrm{m}$ and less than 100$\AA$, respectively. The anode emission current from a 256 tips array was turned-on at a gate voltage of 40 V. Also, the gate current was less than 0.1% of the anode current.

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A Fundamental Study of Selective Metal Electroplating Without Seed Layers Using a Photosensitive Polyimide as Molds (감광성 폴리이미드를 모울드로 이용한 기반층이 없는 선택적 금속 도금에 관한 기초 연구)

  • Ahn, Dong-Sup;Lee, Sang-Wook;Kim, Ho-Sung;Kim, Yong-Kweon
    • Proceedings of the KIEE Conference
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    • 1993.11a
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    • pp.204-206
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    • 1993
  • In this paper we represented electroplating process without seed layers for making metal micro structures needed for applying terminal voltage for one-to-one cell fusion system. In this system, we need thick insulator and metal structures because the diameter of a cell is approximately $40{\mu}m$. So, we adopted the photo-sensitive polyimide as electroplating molds and structural material. Generally, the processes utilizing the photo-sensitive polyimide as molds have metal seed layers on the substrate as electroplating electrodes and requires wiring tasks to these seed layers. We proposed electroplating process without any seed layer on the Si-substrate and simulated P-N-P (electrode - Si substrate - electrode) junction on N-type silicon substrate. Leakage current from one metal structure to another which arise when terminal voltage is applied can be remarkably decreased by doping Boron in the region to be electroplated.

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