• Title/Summary/Keyword: phase-locking

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Implementation of the COHO Unit for Phase-locking of Radar (레이다 위상동기를 위한 COHO Unit의 구현)

  • Cho, Tae-Bok;Shin, Hye-Jin;Lee, Taek-Kyung
    • Journal of Advanced Navigation Technology
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    • v.3 no.1
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    • pp.1-12
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    • 1999
  • For the phase measurement of radar signal in the coherent-on-receiver system, the COHO(Coherent Oscillator) generates the signal which locks to the phase of the transmit pulse. In this paper, COHO unit is developed to generate 60 MHz phase-locked signal. ILO(Injection Locking Oscilator) locks to the sample of the transmit pulse. Gate circuit, ILO, buffer amplifier, and pulse generator are designed and implemented.

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Fast Lock-Acquisition DLL by the Lock Detection (Lock detector를 사용하여 빠른 locking 시간을 갖는 DLL)

  • 조용기;이지행;진수종;이주애;김대정;민경식;김동명
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.963-966
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    • 2003
  • This paper proposes a new locking algorithm of the delay locked loop (DLL) which reduces the lock-acquisition time and eliminates false locking problem to enlarge the operating frequency range. The proposed DLL uses the modified phase frequency detector (MPFD) and the modified charge pump (MCP) to avoid the false locking problem. Adopting a new lock detector that measures delay between elects helps the fast lock-acquisition time greatly. The idea has been confirmed by HSPICE simulations in a 0.35-${\mu}{\textrm}{m}$ CMOS process.

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Analysis of Modified Digital Costas Loop Part I : Performance in the Absence of Noise (변형된 디지털 Costas Loop에 관한 연구 (I) 잡음이 없을 경우의 성능 해석)

  • 정해창;은종관
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.19 no.2
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    • pp.38-50
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    • 1982
  • A new type of digital phase-locked loop (DPLL) called the modified digital Costas loop is proposed and analyzed. The main feature of the proposed loop is that the phase error detector of the loop has linear characteristic. This results from the use of the tan-1 (.) function in the loop. Accordingly, the DPLL can be characterized by a modulo-2$\pi$ linear difference equation. This paper is diveide into two parts. In Part I we describe the proposed system, and analyze the performance of the first-and second-order loops in the absence of noise by the Phase Plane technique. The locking ranges for the DPLL's to achieve exact locking independently of initial conditions have been obtained in closed forms. Also, the false lock and oscillation phenomena occurring under some initial conditions have been considered. These results have been verified by computer simulation. In Part ll we analyze the proposed system in the presence of noise. The steady state probability density function, mean and variance of the phase error have been obtained by solving the Chapman-Kolmogorov equation. These results will be presented in Part ll.

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A DLL Based Clock Synthesizer with Locking Status Indicator A DLL Based Clock Synthesizer with Locking Status Indicator

  • Ryu Young-Soo;Choi Young-Shig
    • Journal of information and communication convergence engineering
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    • v.3 no.3
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    • pp.142-145
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    • 2005
  • In this paper, a new programmable DLL (delay locked loop) based clock synthesizer is proposed. DLL has several inherent advantages, such as no phase accumulation error, fast locking and easy integration of the loop filter. This paper proposes a new programmable DLL that includes a PFD(phase frequency detector), a LSI(lock status indicator), and a VCDL(voltage controlled delay line) to generate multiple clocks. It can generate clocks from 3 to 9 times of input clock with $2{\mu}s$ locking time. The proposed DLL operating in the frequency range of 300MHZ-900MHz is verified by the HSPICE simulation with a $0.35{\mu}m$ CMOS process.

Characteristics of two Extended-Cavity Diode Lasers phase locked with 9.2 GHz frequency offset (9.2 GHz 주파수 차ol로 Phase Locking된 두 다이오드 레이저의 특성 조사)

  • In, Min-Kyo;Park, Yeon-Soo;Cho, Hyuk;Shin, Eun-Ju;Kwon, Taek-Yong;Yoo, Dae-Hyuk;Lee, Ho-Sung;Park, Sang-Eon
    • Proceedings of the Optical Society of Korea Conference
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    • 2002.07a
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    • pp.68-69
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    • 2002
  • 두 대의 결맞은 레이저는 원자의 고분해 분광이나 광통신 등의 여러 분야에서 응용이 가능하다. 본 연구에서는 세슘 원자분수 주파수표준기와 저속 원자빔 주파수표준기에서 원자의 속도 선택 실험에 사용하기 위한 9.2 GHz의 주파수 차이를 가지는 두 대의 결맞은 레이저를 제작하였다. 결맞은 레이저는 주입 잠금(injection locking)이나 위상 잠금 회로(phase locking loop)를 이용하여 만들 수 있다. (중략)

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Spontaneous Oscillatory Rhythm in Retinal Activities of Two Retinal Degeneration (rd1 and rd10) Mice

  • Goo, Yong-Sook;Ahn, Kun-No;Song, Yeong-Jun;Ahn, Su-Heok;Han, Seung-Kee;Ryu, Sang-Baek;Kim, Kyung-Hwan
    • The Korean Journal of Physiology and Pharmacology
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    • v.15 no.6
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    • pp.415-422
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    • 2011
  • Previously, we reported that besides retinal ganglion cell (RGC) spike, there is ~10 Hz oscillatory rhythmic activity in local field potential (LFP) in retinal degeneration model, rd1 mice. The more recently identified rd10 mice have a later onset and slower rate of photoreceptor degeneration than the rd1 mice, providing more therapeutic potential. In this study, before adapting rd10 mice as a new animal model for our electrical stimulation study, we investigated electrical characteristics of rd10 mice. From the raw waveform of recording using $8{\times}8$ microelectrode array (MEA) from in vitro-whole mount retina, RGC spikes and LFP were isolated by using different filter setting. Fourier transform was performed for detection of frequency of bursting RGC spikes and oscillatory field potential (OFP). In rd1 mice, ~10 Hz rhythmic burst of spontaneous RGC spikes is always phase-locked with the OFP and this phase-locking property is preserved regardless of postnatal ages. However, in rd10 mice, there is a strong phase-locking tendency between the spectral peak of bursting RGC spikes (~5 Hz) and the first peak of OFP (~5 Hz) across different age groups. But this phase-locking property is not robust as in rd1 retina, but maintains for a few seconds. Since rd1 and rd10 retina show phase-locking property at different frequency (~10 Hz vs. ~5 Hz), we expect different response patterns to electrical stimulus between rd1 and rd10 retina. Therefore, to extract optimal stimulation parameters in rd10 retina, first we might define selection criteria for responding rd10 ganglion cells to electrical stimulus.

A Novel Fast Open-loop Phase Locking Scheme Based on Synchronous Reference Frame for Three-phase Non-ideal Power Grids

  • Xiong, Liansong;Zhuo, Fang;Wang, Feng;Liu, Xiaokang;Zhu, Minghua;Yi, Hao
    • Journal of Power Electronics
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    • v.16 no.4
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    • pp.1513-1525
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    • 2016
  • Rapid and accurate phase synchronization is critical for the reliable control of grid-tied inverters. However, the commonly used software phase-locked loop methods do not always satisfy the need for high-speed and accurate phase synchronization under severe grid imbalance conditions. To address this problem, this study develops a novel open-loop phase locking scheme based on a synchronous reference frame. The proposed scheme is characterized by remarkable response speed, high accuracy, and easy implementation. It comprises three functional cascaded blocks: fast orthogonal signal generation block, fast fundamental-frequency positive sequence component construction block, and fast phase calculation block. The developed virtual orthogonal signal generation method in the first block, which is characterized by noise immunity and high accuracy, can effectively avoid approximation errors and noise amplification in a wide range of sampling frequencies. In the second block, which is the foundation for achieving fast phase synchronization within 3 ms, the fundamental-frequency positive sequence components of unsymmetrical grid voltages can be achieved with the developed orthogonal signal construction strategy and the symmetrical component method. The real-time grid phase can be consequently obtained in the third block, which is free from self-tuning closed-loop control and thus improves the dynamic performance of the proposed scheme. The proposed scheme is adaptive to severe unsymmetrical grid voltages with sudden changes in magnitude, phase, and/or frequency. Moreover, this scheme is able to eliminate phase errors induced by harmonics and random noise. The validity and utility of the proposed scheme are verified by the experimental results.

Study of Collective Synchronous Dynamics in a Neural Network Model

  • Cho, Myoung Won
    • Journal of the Korean Physical Society
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    • v.73 no.9
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    • pp.1385-1392
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    • 2018
  • A network with coupled biological neurons provides various forms of collective synchronous dynamics. Such phase-locking dynamics states resemble eigenvectors in a linear coupling system in that the forms are determined by the symmetry of the coupling strengths. However, the states behave as attractors in a nonlinear dynamics system. We here study the collective synchronous dynamics in a neural system by using a novel theory. We exhibit how the period and the stability of individual phase-locking dynamics states are determined by the characteristics of synaptic couplings. We find that, contrary to common sense, the firing rate of a synchronized state decreases with increasing synaptic coupling strength.

Multi-version Locking Scheme for Flash Memory Devices (플래시 메모리 기기를 위한 다중 버전 잠금 기법)

  • Byun, Si-Woo
    • Proceedings of the KIEE Conference
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    • 2005.05a
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    • pp.191-193
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    • 2005
  • Flash memories are one of best media to support portable computer's storages. However, we need to improve traditional data management scheme due to the relatively slow characteristics of flash operation as compared to RAM memory. In order to achieve this goal, we devise a new scheme called Flash Two Phase Locking (F2PL) scheme for efficient data processing. F2PL improves transaction performance by allowing multi version reads and efficiently handling slow flash write/erase operation in lock management process.

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LIVELOCK-THIN LOCKING PROTOCOL FOR TRANSACTION SCHEDULING IN DISTRIBUTED DATA NETWORK MANAGEMENT (분산망 거래관리를 위한 기아현상 극소화 잠금규약)

  • 이혜경;김응모
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.12A
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    • pp.1891-1898
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    • 1999
  • Traditional syntax-oriented serializability notions are considered to be not enough to handle in particular various types of transaction in terms of duration of execution. To deal with this situation, altruistic locking has attempted to reduce delay effect associated with lock release moment by use of the idea of donation. An improved form of altruism has also been deployed in extended altruistic locking in a way that scope of data to be early released is enlarged to include even data initially not intended to be donated. In this paper, we first of all investigated limitations inherent in both altruistic schemes from the perspective of alleviating starvation occasions for transactions in particular of short-lived nature. The idea of two-way donation locking(2DL) has then been experimented to see the effect of more than single donation in distributed database systems. Simulation experiments shows that 2DL outperforms the conventional two-phase locking in terms of the degree of oncurrency and average transaction waiting time.

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