• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 춘계학술대회 논문집 전자세라믹스 센서 및 박막재료 반도체재료 일렉트렛트 및 응용기술
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• pp.31-34
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• 2000

It is very important to understand the correlation of between inter layer dielectric(ILD) CMP process and various facility factors supplied to equipment system. In this paper, the correlation between the various facility factors supplied to CMP equipment system and ILD CMP process were studied. To prevent the partial over-polishing(edge hot-spot) generated in the wafer edge area during polishing, we analyzed various facilities supplied at supply system. With facility shortage of D.I. water(DIW) pressure, we introduced an adding purified $N_2(PN_2)$ gas in polishing head cleaning station for increasing a cleaning effect. DIW pressure and PN2 gas factors were not related with removal rate, but edge hot-spot of patterned wafer had a serious relation. We estimated two factors (DIW pressure and PN2 gas) for the improvement of CMP process. Especially, we obtained a uniform planarity in patterned wafer and prohibited more than 90% wafer edge over-polishing. In this study, we acknowledged that facility factors supplied to equipment system played an important role in ILD-CMP process.

• The Korean Journal of Ceramics
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• 제3권1호
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• pp.34-36
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• 1997

We have fabricated a patterned diamond field emitter on a silicon substrate. Fine diamond particles were planted on a silicon wafer using conventional scratch method. A silicon oxide film was deposited on the substrate seeded with diamond powder. An array of holes was patterned on the silicon oxide film using VLSI processing technology. Diamond grains were grown using a microwave plasma-assisted chemical vapor deposition. Because diamond could not grow on the silicon oxide barrier, diamond grains filled only the patterned holes in the silicon oxide film, resulting in an array of diamond tips.

• KSTLE International Journal
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• 제7권1호
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• pp.14-17
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• 2006

In this paper, we report on the replication of surface topography of natural leaf of Lotus onto thin polymeric films using a capillarity-directed soft lithographic technique. PDMS molds were used to replicate the surface. The replication was carried out on poly(methyl methacrylate) (PMMA) film coated on silicon wafer. The patterns so obtained were investigated for their friction properties at micro-scale using a ball-on-flat type micro-tribo tester, under reciprocating motion. Soda lime balls (1 mm diameter) were used as counterface sliders. Friction tests were conducted at a constant applied normal load of $3000{\mu}N$ and speed of 1mm/s. All experiments were conducted at ambient temperature ($24{\pm}1^{\circ}C$) and relative humidity ($45{\pm}5%$). Results showed that the patterned samples exhibited superior tribological properties when compared to the silicon wafer and non patterned sample (PMMA thin film). The reduced real area of contact projected by the surfaces was the main reason for their enhanced friction property.

• 한국정밀공학회지
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• 제23권8호
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• pp.178-184
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• 2006

Hot embossing is to fabricate desired pattern on the polymer substrate by pressing the patterned mold against the substrate which is heated above the glass transition temperature, and it is a high throughput fabrication method for bio chip, optical microstructure, etc. due to the simultaneous large area patterning. However, the bad pattern fidelity in large area patterning is one of the obstacles to applying the hot embossing technology for mass production. In the present study, PDMS pad was used as a cushion on the backside of the micro-patterned 4 inch Si mold to improve the pattern fidelity over the 4 inch PMMA sheet by increasing the conformal contact between the Si mold and the PMMA sheet. The pattern replicability improvement over 4 inch wafer scale was evaluated by comparing the replicated pattern height and depth for PDMS-cushioned Si mold against the rigid Si mold without PDMS cushion.

• 한국자기학회지
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• 제18권2호
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• pp.49-53
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• 2008

50 nm pitch의 magnetic dot pattern을 갖는 hard disk drive용 patterned media를 nanoimprint lithography(NIL) patterning과 electroplating 공정을 이용하여 제작하고 자기 및 결정구조 특성을 관찰하였다. Patterned media는 Si(100) wafer 위에 Ru(20nm)/Ta(5 nm)/$SiO_2$(100 nm)를 순차적으로 증착한 후 nanoimprint lithography를 이용하여 25 nm half pitch의 hole pattern을 형성하고 그 후 패터닝된 기판을 plasma ashing 공정을 이용하여 기판의 Ru층을 노출시킨뒤 electroplating을 이용하여 Co-Pt 합금막을 증착하여 제작하였다. Magnetic force microscopy(MFM) 분석을 이용하여 제작된 각각의 magnetic dot pattern이 single domain 특성과 수직자기이방성을 가지고 있음을 확인하였고, superconducting quantum interference device(SQUID) 분석을 통하여 2900 Oe이상의 높은 수직방향 보자력을 확인하였다.

• 마이크로전자및패키징학회지
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• 제16권1호
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• pp.27-31
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• 2009

본 논문에서는 웨이퍼 레벨 기술을 이용한 CIS용 폴리머 접합 기술을 연구하고 접합 후의 warpage 분석과 개별 패키지의 신뢰성 테스트를 수행하였다. 균일한 접합 높이를 유지하기 위하여 glass 웨이퍼 상에 dam을 형성하고 접합용 폴리머 층을 patterning하여 Si과 glass 웨이퍼의 접합 테스트를 수행하였다. Si 웨이퍼의 접합온도, 접합 압력 그리고 접합 층이 낮을수록 warpage 결과가 감소하였으며 접합시간과 승온 시간이 짧을수록 warpage 결과가 증가하는 것을 확인하였다. 접합 된 웨이퍼를 dicing 하여 각 개별 칩 단위로 TC, HTC, Humidity soak의 신뢰성 테스트를 수행하였으며 warpage 결과가 패키지의 신뢰성 결과에 미치는 영향은 미비한 것으로 확인되었다.

• 대한기계학회논문집A
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• 제34권12호
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• pp.1857-1863
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• 2010

본 논문에서는 탄소나노튜브 필름을 이용한 투명 압저항체의 제작 및 특성 연구를 수행하였다. 진공필터 방식으로 제작된 다양한 투과도를 가지는 탄소나노튜브 필름은 금층이 증착된 실리콘 기판위에서 사진식각 공정을 통해 패터닝이 된 후, 금층과 실리콘 기판의 약한 접착력으로 인해 실리콘 러버인 poly-dimethysiloxane (PDMS) 로 전사된다. 탄소나노튜브 필름의 압저항 특성을 분석하기 위해, 얇은 PDMS 멤브레인의 처짐에 대한 탄소나노튜브 필름의 저항 변화를 측정하여 10-20 의 개이지 팩터를 얻었으며, 인가 압력에 대한 저항 변화 실험을 수행하였다. 본 실험을 통하여 탄소나노튜브 필름은 폴리머 멤스의 다양한 응용분야에 투명한 압저항체로 사용될 수 있을 것으로 판단한다.

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2004년도 추계학술대회논문집
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• pp.294-297
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• 2004

RTP(Rapid Thermal Pressing) is to fabricate desired pattern on polymer substrate by pressing patterned mold against the substrate heated around glass transition temperature. For a successful RTP process, the whole process including heating, molding, cooling and demolding should be conducted 'rapidly' as possible. As the RTP process is effective in replicating patterns on flat large surface without causing shape distortion after cooling, it is being widely used for fabricating various micro/bio application components, especially with channel-type microstructures on surface. This investigation finally aims to develop a RTP process machine for mass-producing micro/bio application components. As a first step for that purpose, we intended to examine the technological difficulties for realizing mass production by RTP process. Therefore, in the current paper, 4 kinds of RTP machines were examined and then the RTP process was conducted experimentally for PMMA film by using one of the machines, HEX 03. The micro-patterned molds used for RTP experiment was fabricated from silicon wafer by semi-conduct process. The replicated micro patterns on PMMA films were examined using SEM and the causes of defect observed in the replicated patterns were discussed.

• 전자공학회논문지 IE
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• 제47권2호
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• pp.8-12
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• 2010

TEM(Transmission Electrion microsopy) 투과전자현미경은 재료의 기초 구조 분석과 반도체 또는 생물시편의 미세 구조분석에 널리 사용되는 장비이다. TEM 분석은 필수적으로 목적에 부합되는 적절한 시편제작이 수반되어야 한다. 다양한 전자 현미경 시편 제작 방법 중 본 논문에서는 FIB(Focus Ion Beam)를 이용한 시편 제작법 중 시편에 입사되는 에너지와 이온 Gun과 시편과의 상호 각도, 이온 밀링 깊이 조절 등의 실험을 통하여 표면 손상 최소화를 벌크 웨이퍼와 패턴화된 시편에서 실험하였다. 최소화된 표면 영향성(약 5nm)을 패턴화된 시편에 구현하였다.

• 한국정밀공학회지
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• 제19권5호
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• pp.149-158
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• 2002

Recently, the minimum line width shows a tendency to decrease and the multi-level increases in semiconductor. Therefore, a planarization technique is needed and chemical mechanical polishing(CMP) is considered as one of the most suitable process. CMP accomplishes a high polishing performance and a global planarization of high quality. However there are several defects in CMF, such as micro-scratches, abrasive contaminations and non-uniformity of polished wafer edges. Wet etching process including spin-etching can eliminate the defects of CMP. It uses abrasive-free chemical solution instead of slurry. On this study, ILD(Interlayer-Dielectric) was removed by CMP and wet etching process using DHF(Diluted HF) in order to investigate the possibility of planrization by wet etching mechanism. In the thin film wafer, the results were evaluated from the viewpoint of material removal rate(MRR) and within wafer non-uniformity(WIWNU). And the pattern step heights were also compared for the purpose of planarity characterization of the patterned wafer. Moreover, Chemical polishing process which is the wet etching process with mechanical energy was introduced and evaluated for examining the characteristics of planarization.