• Title/Summary/Keyword: pattern generator

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A study on the generation of JIT compiler using JBURG (JBURG를 이용한 JIT컴파일러 생성에 관한 연구)

  • Kang Kyung-Woo
    • The KIPS Transactions:PartA
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    • v.12A no.1 s.91
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    • pp.59-64
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    • 2005
  • In this paper, we propose a method of generating a JIT compiler using JBURG. JBURG is a tool of generating the code generator using bottom-up tree pattern matching for Java. Our method can be derived from some relations over tree patterns. The proposed scheme is more efficient than JBURG because we can avoid unfruitful tests with the smaller site of the scheme. Furthermore, the relevant analyses needed for this proposal are largely achieved at non- compile time, which secures actual efficiency at compilation time.

A Combined CPG and GA Based Adaptive Humanoid Walking for Rolling Terrains (굴곡진 지형에 대한 CPG 및 GA 결합 기반 적응적인 휴머노이드 보행 기법)

  • Kyeong, Deokhwan;Seo, Kisung
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.67 no.5
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    • pp.663-668
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    • 2018
  • A combined CPG (Central Pattern Generator) based foot trajectory and GA (Genetic Algorithm) based joint compensation method is presented for adaptive humanoid walking. In order to increase an adaptability of humanoid walking for rough terrains, the experiment for rolling terrains are introduced. The CPG based foot trajectory method has been successfully applied to basic slops and variable slops, but has a limitation for the rolling terrains. The experiments are conducted in an ODE based Webots simulation environment using humanoid robot Nao to verify a stability of walking for various rolling terrains. The proposed method is compared to the previous CPG foot trajectory technique and shows better performance especially for the cascade rolling terrains.

An Evolutionary Optimization Approach for Optimal Hopping of Humanoid Robots

  • Hong, Young-Dae
    • Journal of Electrical Engineering and Technology
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    • v.10 no.6
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    • pp.2420-2426
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    • 2015
  • This paper proposes an evolutionary optimization approach for optimal hopping of humanoid robots. In the proposed approach, the hopping trajectory is generated by a central pattern generator (CPG). The CPG is one of the biologically inspired approaches, and it generates rhythmic signals by using neural oscillators. During the hopping motion, the disturbance caused by the ground reaction forces is compensated for by utilizing the sensory feedback in the CPG. Posture control is essential for a stable hopping motion. A posture controller is utilized to maintain the balance of the humanoid robot while hopping. In addition, a compliance controller using a virtual spring-damper model is applied for stable landing. For optimal hopping, the optimization of the hopping motion is formulated as a minimization problem with equality constraints. To solve this problem, two-phase evolutionary programming is employed. The proposed approach is verified through computer simulations using a simulated model of the small-sized humanoid robot platform DARwIn-OP.

Design of the non-blocking pattern generator for the elimination of conflicts in banyan ATM switch (반얀망 ATM 스위치에서 충돌 제거를 위한 비충돌 패턴 발생기 설계)

  • Lee, Joo-Young;Jung, Jae-Il
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.12
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    • pp.8-16
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    • 1998
  • In this paper, we propose the non-blocking pattern generator(NBPG) for banyan ATM switches and evaluate the performance by simulation. The proposed NBPG first classifies input cells into two groups. the conflict intended cells are assigned to their new non-blocking input addresses by the conflict table. Simulation results show that the NBPG generates non-blocking address patterns with minimal changes.

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Implementation of Laser Pattern Controller Using Function Generator IC (함수 발생기용 IC를 이용한 레이저 패턴 제어기 구현)

  • Lee, Seok-Won;Lee, Tea-Jin;Nam, Yun-Seok
    • Proceedings of the KIEE Conference
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    • 2003.07d
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    • pp.2489-2491
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    • 2003
  • In this study, we implement the laser pattern controller using function generator IC. Overall system consists of : (1) laser excitation circuit and laser tube, (2) two small mirrors to reflect laser beam on the screen, (3) two small motors for X, Y axis enabling each attached mirrors to rotate, (4) controller for motor control and user interface, (5) system power. We explain the architecture of the system and required theory to implement the system. Finally, experimental results are illustrated to show the performance of the system.

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The Design of ASIC chip for Memory Tester (Memory Tester용 ASIC 칩의 설계)

  • Joung, J.W.;Kang, C.H.;Choi, C.;Park, J.S.
    • Proceedings of the KIEE Conference
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    • 2004.05a
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    • pp.153-155
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    • 2004
  • In this paper, we design the memory tester chip playing an important role in the memory tester as central parts. Memory tester has the sixteen inner instructions to control the test sequence and the address and data signals to DUT. These instructions are saved in memory with each block such as sequencer and pattern generator. Sequencer controls the test sequence according to instructions saved in the memory. And Pattern generator generates the address and data signals according to instructions saved in the memory, too. We can use these chips for various functional test of memory.

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Transient Diagnosis and Prognosis for Secondary System in Nuclear Power Plants

  • Park, Sangjun;Park, Jinkyun;Heo, Gyunyoung
    • Nuclear Engineering and Technology
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    • v.48 no.5
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    • pp.1184-1191
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    • 2016
  • This paper introduces the development of a transient monitoring system to detect the early stage of a transient, to identify the type of the transient scenario, and to inform an operator with the remaining time to turbine trip when there is no operator's relevant control. This study focused on the transients originating from a secondary system in nuclear power plants (NPPs), because the secondary system was recognized to be a more dominant factor to make unplanned turbine-generator trips which can ultimately result in reactor trips. In order to make the proposed methodology practical forward, all the transient scenarios registered in a simulator of a 1,000 MWe pressurized water reactor were archived in the transient pattern database. The transient patterns show plant behavior until turbine-generator trip when there is no operator's intervention. Meanwhile, the operating data periodically captured from a plant computer is compared with an individual transient pattern in the database and a highly matched section among the transient patterns enables isolation of the type of transient and prediction of the expected remaining time to trip. The transient pattern database consists of hundreds of variables, so it is difficult to speedily compare patterns and to draw a conclusion in a timely manner. The transient pattern database and the operating data are, therefore, converted into a smaller dimension using the principal component analysis (PCA). This paper describes the process of constructing the transient pattern database, dealing with principal components, and optimizing similarity measures.

A high reliable optical image encryption system which combined discrete chaos function with permutation algorithm (이산 카오스 함수와 Permutation Algorithm을 결합한 고신뢰도 광영상 암호시스템)

  • 박종호
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.9 no.4
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    • pp.37-48
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    • 1999
  • Current encryption methods have been applied to secure communication using discrete chaotic system whose output is a noise-like signal which differs from the conventional encryption methods that employ algebra and number theory[1-2] We propose an optical encryption method that transforms the primary pattern into the image pattern of discrete chaotic function first a primary pattern is encoded using permutation algorithm, In the proposed system we suggest the permutation algorithm using the output of key steam generator and its security level is analyzed. In this paper we worked out problem of the application about few discrete chaos function through a permutation algorithm and enhanced the security level. Experimental results with image signal demonstrate the proper of the implemented optical encryption system.

Implementation of Pattern Generator for Efficient IDDQ Test Generation in CMOS VLSI (CMOS VLSI의 효율적인 IDDQ 테스트 생성을 위한 패턴 생성기의 구현)

  • Bae, Seong-Hwan;Kim, Gwan-Ung;Jeon, Byeong-Sil
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.4
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    • pp.292-301
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    • 2001
  • IDDQ Testing is a very effective testing method to detect many kinds of physical defects occurred in CMOS VLSI circuits. In this paper, we consider the most commonly occurring bridging faults in current CMOS technologies and develop pattern generator for IDDQ testing using efficient IDDQ test algorithms. The complete set of bridging faults between every pair of all nodes(internal and external nodes) within circuit under test is assumed as target fault model. The merit of considering the complete bridging fault set is that layout information is not necessary. Implemented test pattern generator uses a new neighbor searching algorithm and fault collapsing schemes to achieve fast run time, high fault coverage, and compact test sets. Experimental results for ISCAS benchmark circuits demonstrate higher efficiency than those of previous methods.

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A Study on the Extraction of Feature Variables for the Pattern Recognition of Welding Flaws (용접결함의 형상인식을 위한 특징변수 추출에 관한 연구)

  • Kim, Jae-Yeol;Roh, Byung-Ok;You, Sin;Kim, Chang-Hyun;Ko, Myung-Soo
    • Journal of the Korean Society for Precision Engineering
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    • v.19 no.11
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    • pp.103-111
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    • 2002
  • In this study, the natural flaws in welding parts are classified using the signal pattern classification method. The storage digital oscilloscope including FFT function and enveloped waveform generator is used and the signal pattern recognition procedure is made up the digital signal processing, feature extraction, feature selection and classifier design. It is composed with and discussed using the distance classifier that is based on euclidean distance the empirical Bayesian classifier. feature extraction is performed using the class-mean scatter criteria. The signal pattern classification method is applied to the signal pattern recognition of natural flaws.