• Title/Summary/Keyword: path-switching

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An optimal design guideline for voltage drop of DC distribution system with batteries (예비축전지를 갖는 배전계통 전압강하의 비용최적 설계)

  • Cho, Il-Kwon;Kim, Marn-Go
    • Proceedings of the KIEE Conference
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    • 1994.11a
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    • pp.400-402
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    • 1994
  • The voltage drop in distribution path of battery-reserved DC power system can affect the total of battery, cable and electricity costs. To determine an optimum voltage drop in distribution path for minimizing the total cost, battery, cable and electricity costs are represented as a function of the voltage drop, respectively, and are summed up to the total cost. An optimum voltage drop is selected as the value giving the minimum total cost. In this paper, a design technique of optimum voltage drop in distribution path of DC power system is proposed to minimize the total of battery, cable and electricity costs. The design procedure is described and design curve for selecting optimum voltage drop is also presented as a function of distribution distance.

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A High-Level Data Path Allocation Algorithm for Low Power Architecture (저 전력 아키텍처를 위한 상위 레벨 데이터 패스 할당 알고리즘)

  • Lin, Chi-Ho
    • Journal of IKEEE
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    • v.7 no.2 s.13
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    • pp.166-171
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    • 2003
  • In this paper, we propose a minimal power data path allocation algorithm for low power circuit design. The proposed algorithm minimizes switching activity for input variables in scheduled CDFG. Allocations are further divided into the tasks of register allocation and module allocation. The register allocation algorithm execute that it eliminate spurious switching activity in functional unit and minimize the numbers of multiplexer. Also, resource allocation method selects a sequence of operations for a module such that the switching activity is reduced. Therefore, the algorithm executes to minimize the switching activity of input values, sequence of operations and number of multiplexer. Experimental results using benchmarks show that power is reduction effect from 13% to 17% power consumption, when compared with the Genesis-lp high-level synthesis system.

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The Traffic-Carrying Capacity Analysis of TDX-10 Switch Network (TDX-10스윗치 네트워크의 통화처리용량 해석)

  • Suh, Jae-Joon;Lee, Kang-Won;Lee, Heon
    • Proceedings of the Korean Institute of Communication Sciences Conference
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    • 1987.04a
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    • pp.79-81
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    • 1987
  • The traffic characteristicsof digitalswich network depend on the structure blocking probability, path searching method and etc. This paper presents the study of TDX-1 swicth network traffic capacity by considering some decisive factors such as call processing software, switch network structrure and control schme Conclusively the study shows that the switch network of TDX-1 can handle approximately up to 1650 Erlang.

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A New Zero-Voltage-Switching Bridgeless PFC, Using an Active Clamp

  • Ramezani, Mehdi;Ghasedian, Ehsan;Madani, Seyed M.
    • Journal of Power Electronics
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    • v.12 no.5
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    • pp.723-730
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    • 2012
  • This paper presents a new ZVS single phase bridgeless (Power Factor Correction) PFC, using an active clamp to achieve zero-voltage-switching for all main switches and diodes. Since the presented PFC uses a bridgeless rectifier, most of the time, only two semiconductor components are in the main current path, instead of three in conventional single-switch configurations. This property significantly reduces the conduction losses,. Moreover, zero voltage switching removes switching loss of all main switches and diodes. Also, auxiliary switch turns on zero current condition. The presented converter needs just a simple non-isolated gate drive circuitry to drive all switches. The eight stages of each switching period and the design considerations and a control strategy are explained. Finally, the converter operation is verified by simulation and experimental results.

Load-Balanced One-hop Overlay Multipath Routing with Path Diversity

  • Liao, Jianxin;Tian, Shengwen;Wang, Jingyu;Li, Tonghong;Qi, Qi
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.8 no.2
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    • pp.443-461
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    • 2014
  • Overlay routing has emerged as a promising approach to improve reliability and efficiency of the Internet. For one-hop overlay source routing, when a given primary path suffers from the link failure or performance degradation, the source can reroute the traffic to the destination via a strategically placed relay node. However, the over-heavy traffic passing through the same relay node may cause frequent package loss and delay jitter, which can degrade the throughput and utilization of the network. To overcome this problem, we propose a Load-Balanced One-hop Overlay Multipath Routing algorithm (LB-OOMR), in which the traffic is first split at the source edge nodes and then transmitted along multiple one-hop overlay paths. In order to determine an optimal split ratio for the traffic, we formulate the problem as a linear programming (LP) formulation, whose goal is to minimize the worse-case network congestion ratio. Since it is difficult to solve this LP problem in practical time, a heuristic algorithm is introduced to select the relay nodes for constructing the disjoint one-hop overlay paths, which greatly reduces the computational complexity of the LP algorithm. Simulations based on a real ISP network and a synthetic Internet topology show that our proposed algorithm can reduce the network congestion ratio dramatically, and achieve high-quality overlay routing service.

Estimating the Effects of Multipath Selection on Concurrent Multipath Transfer

  • Wang, Jingyu;Liao, Jianxin;Wang, Jing;Li, Tonghong;Qi, Qi
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.8 no.4
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    • pp.1406-1423
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    • 2014
  • Multi-mode device which combines multiple access technologies into a device will offer more cost-effective solution than a sole access implementation. Its concurrent multipath transfer (CMT) technology can transmit media flows over multiple end-to-end paths simultaneously, which is essential to select at least two paths from all available paths. At real networks, different paths are likely to overlap each other and even share bottleneck, which can weaken the path diversity gained through CMT. Spurred by this observation, it is necessary to select multiple independent paths as much as possible to avoid underlying shared bottleneck between topologically joint paths. Recent research in this context has shown that different paths with shared bottleneck can weaken the path diversity gained through CMT. In our earlier work, a grouping-based multipath selection (GMS) mechanism is introduced and developed. However, how to estimating the selection is still to be resolved. In this paper, we firstly introduce a Selection Correctness Index (SCI) to evaluate the correctness of selection results in actual CMT experiment. Therefore, this metric is helpful to discuss and validate the accuracy of the output paths. From extensive experiments with a realized prototype, the proposed scheme provides better evaluation tool and criterion in various network conditions.

Stochastic Optimization of Multipath TCP for Energy Minimization and Network Stability over Heterogeneous Wireless Network

  • Arain, Zulfiqar Arain;Qiu, Xuesong;Zhong, Lujie;Wang, Mu;Chen, Xingyan;Xiong, Yongping;Nahida, Kiran;Xu, Changqiao
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.15 no.1
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    • pp.195-215
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    • 2021
  • Multipath Transport Control Protocol (MPTCP) is a transport layer protocol that enables multiple TCP connections across various paths. Due to path heterogeneity, it incurs more energy in a multipath wireless network. Recent work presents a set of approaches described in the literature to support systems for energy consumption in terms of their performance, objectives and address issues based on their design goals. The existing solutions mainly focused on the primary system model but did not discourse the overall system performance. Therefore, this paper capitalized a novel stochastically multipath scheduling scheme for data and path capacity variations. The scheduling problem formulated over MPTCP as a stochastic optimization, whose objective is to maximize the average throughput, avoid network congestion, and makes the system more stable with greater energy efficiency. To design an online algorithm that solves the formulated problem over the time slots by considering its mindrift-plus penalty form. The proposed solution was examined under extensive simulations to evaluate the anticipated stochastic optimized MPTCP (so-MPTCP) outcome and compared it with the base MPTCP and the energy-efficient MPTCP (eMPTCP) protocols. Simulation results justify the proposed algorithm's credibility by achieving remarkable improvements, higher throughput, reduced energy costs, and lower-end to end delay.

Bypass, homotopy path and local iteration to compute the stability point

  • Fujii, Fumio;Okazawa, Shigenobu
    • Structural Engineering and Mechanics
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    • v.5 no.5
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    • pp.577-586
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    • 1997
  • In nonlinear finite element stability analysis of structures, the foremost necessary procedure is the computation to precisely locate a singular equilibrium point, at which the instability occurs. The present study describes global and local procedures for the computation of stability points including bifurcation points and limit points. The starting point, at which the procedure will be initiated, may be close to or arbitrarily far away from the target point. It may also be an equilibrium point or non-equilibrium point. Apart from the usual equilibrium path, bypass and homotopy path are proposed as the global path to the stability point. A local iterative method is necessary, when it is inspected that the computed path point is sufficiently close to the stability point.

Inductive Switching Noise Suppression Technique for Mixed-Signal ICs Using Standard CMOS Digital Technology

  • Im, Hyungjin;Kim, Ki Hyuk
    • Journal of information and communication convergence engineering
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    • v.14 no.4
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    • pp.268-271
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    • 2016
  • An efficient inductive switching noise suppression technique for mixed-signal integrated circuits (ICs) using standard CMOS digital technology is proposed. The proposed design technique uses a parallel RC circuit, which provides a damping path for the switching noise. The proposed design technique is used for designing a mixed-signal circuit composed of a ring oscillator, a digital output buffer, and an analog noise sensor node for $0.13-{\mu}m$ CMOS digital IC technology. Simulation results show a 47% reduction in the on-chip inductive switching noise coupling from the noisy digital to the analog blocks in the same substrate without an additional propagation delay. The increased power consumption due to the damping resistor is only 67% of that of the conventional source damping technique. This design can be widely used for any kind of analog and high frequency digital mixed-signal circuits in CMOS technology