• 제목/요약/키워드: parasitic inductance

검색결과 79건 처리시간 0.024초

A Straightforward Estimation Approach for Determining Parasitic Capacitance of Inductors during High Frequency Operation

  • Kanzi, Khalil;Nafissi, Hanidreza R.;Kanzi, Majid
    • Journal of international Conference on Electrical Machines and Systems
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    • 제3권3호
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    • pp.339-353
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    • 2014
  • A straightforward method for optimal determining of a high frequency inductor's parasitic capacitance is presented. The proposed estimation method is based on measuring the inductor's impedance samples over a limited frequency range bordering on the resonance point considering k-dB deviation from the maximum impedance. An optimized solution to k could be obtained by minimizing the root mean squared error between the measured and the estimated impedance values. The model used to provide the estimations is a parallel RLC circuit valid at resonance frequency which will be transferred to the real model considering the mentioned interval of frequencies. A straightforward algorithm is suggested and programmed using MATLAB which does not require a wide knowledge of design parameters and could be implemented using a spectrum analyzer. The inputs are the measured impedance samples as a function of frequency along with the diameter of the conductors. The suggested algorithm practically provides the estimated parameters of a real inductance model at different frequencies, with or without design information. The suggested work is different from designing a high frequency inductor; it is rather concentration of determining the parameters of an available real inductor that could be easily done by a recipe provided to a technician.

기생패치를 이용한 소형 뮤-제로 영차공진 안테나 (Small Mu-Zero Zeroth Order Resonance Antenna with Parasitic Patch)

  • 엄귀섭;이창현;이재곤;이정해
    • 한국전자파학회논문지
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    • 제27권4호
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    • pp.350-357
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    • 2016
  • 본 논문에서는 5.8 GHz에서 동작하는 기생패치를 이용한 소형 메타구조 기반의 뮤-제로 영차공진 안테나를 제안한다. 제안된 안테나는 뮤-네거티브(MNG: Mu-negative) 전송선로의 직렬 인덕턴스와 커패시턴스를 사용하는 뮤-제로 영차공진 안테나이며, 간단한 구조의 기생패치를 추가함으로써 직렬 커패시턴스를 증가시켜 소형화 하였다. 추가된 기생패치는 기존의 직렬 커패시턴스에 추가적인 병렬로 커패시턴스를 만들어 공진 주파수를 결정하는 직렬 커패시턴스를 등가적으로 증가시킨다. 기생패치는 HFSS를 이용한 모의실험을 통하여 최적화되었다. 제안된 안테나는 0.59의 kr값을 가지며, 기존 뮤-제로 영차공진 안테나 크기 대비 24 % 소형화 되었으며, 92 %의 효율과 6.57 dBi의 이득을 보였다. 최종 설계된 안테나는 제작 및 측정되었으며, 측정 결과는 모의실험 결과와 잘 일치함을 확인하였다.

Shielding 효과를 고려한 회로 설계 방법에 관한 연구

  • 김용규;권대한;황성우
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2001년도 하계종합학술대회 논문집(1)
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    • pp.413-416
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    • 2001
  • In high frequency range, RF circuit design without considering shielding effect can cause several significant changes due to increase in parasitic capacitance and inductance between RF signal lines and shielding box. In this paper, bandpass filter has been made to measure the shielding effect and its s-parameter has been measured by Vector Network Analyzer (VNA). Equivalent circuit model including the shielding effect has been constructed with the lumped elements extracted from the 3D electromagnetic simulator, Maxwell SI. Then, the validity of the model is verified using microwave circuit simulator, ADS (Advanced Design System).

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Radio Frequency 회로 모듈 BGA 패키지 (Electrical Characterization of BGA interconnection for RF packaging)

  • 김동영;우상현;최순신;지용
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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    • pp.96-99
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    • 2000
  • We presents a BGA(Ball Grid Array) package for RF circuit modules and extracted its electrical parameters. We constructed a BGA package of ITS(Intelligent Transportation System) RF module and examined electrical parameters with a HP5475A TDR(Time Domain Reflectometry) equipment and compared its electrical parasitic parameters with PCB RF circuits. With a BGA substrate of 3 $\times$ 3 input and output terminals, we have found that self capacitance of BGA solder ball is 68.6fF, self inductance 146pH, mutual capacitance 10.9fF and mutual inductance 16.9pH. S parameter measurement with a HP4396B Network Analyzer showed the resonance frequency of 1.55㎓ and the loss of 0.26dB. Thus, we may improve electrical performance when we use BGA package structures in the design of RF circuit modules.

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비접촉 충전 에너지 전달을 위한 포워드형 ZVS MRC에 관한 연구 (The Study on Forward ZVS MRC for Non-contact Charging Energy Transmission)

  • 김영길;김진우;김태웅;원영진;이성백
    • 조명전기설비학회논문지
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    • 제15권2호
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    • pp.64-72
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    • 2001
  • 본 논문에서는 비접촉 충전 에너지 전달을 위한 포워드 ZVS MRC(Zero Voltage Switching Multi Resonant Converter)를 제안하였다. 포워드 ZVS MRC는 기생성분을 흡수하는데 그리고 스위칭손실을 최소화하는데 효과적이다. 이것은 높은 주파수동작에 적합하며 따라서 이것을 비접촉 충전에너지 전달에 적용하였다. 사용된 컨버터는 분리형 트랜스포머와 동기식정류기를 이용하였다. 갭의 크기에 따른 결합계수(k), 누설인덕턴스, 결합인 덕턴스 그리고 공진 주파수를 측정하였다. 구해진 값을 이용하여 회로를 설계, 구현하였으며 제안된 회로는 PSPICE로 시뮬레이션하였고 실험하였다. 주스위치의 전압 스트래스와 출력전력을 측정하였으며 제안된 컨버터가 비접촉 충전 에너지 전달에 적합함을 보였다.

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유도 가열용 Half-Bridge 인버터 시스템의 신뢰성 향상 및 최적제어에 관한 연구 (A Study on the Reliability and Optimal Control of Half-Bridge Inverter for Induction Beating System)

  • 유상봉
    • 기술사
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    • 제33권1호
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    • pp.94-105
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    • 2000
  • The purpose of this paper is to obtain the improved reliability and optimal control of the half-bridge inverter for induction heating system. Parasitic inductance components within the inverter circuit for induction heating including the loss-less turn-off snubber capacitor considerably affect stable operation and noise level of the system. This paper analyzes the effect of the inductance in detail and presents a new snubber configuration suitable for the half-bridge inverter to effectively reduce it. In the half-bridge inverter for induction heating the capacity of the loss-less snubber capacitor determines the switching losses because the zero voltage turn-on switching is used. However, the increase of the capacitor is limited by the system specifications, so that it is not easy work to reduce the switching loss. To effectively overcome the limitation, this paper introduces an active auxiliary resonant circuit suitable for the half-bridge inverter circuit, which operates actively according to the variation of load condition. It is also one of the most important study issues for the half-bridge inverter driven induction heater that the development of optimal control scheme considering varied load condition should be achieved. The control strategy ensures a very stable operation of overall inverter system and zero voltage turn-on switching irrespective of sensitive load parameter variations, in particular, even under the non-magnetic materials.

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A 77 GHz 3-Stage Low Noise Amplifier with Cascode Structure Utilizing Positive Feedback Network using 0.13 μm CMOS Process

  • Lee, Choong-Hee;Choi, Woo-Yeol;Kim, Ji-Hoon;Kwon, Young-Woo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권4호
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    • pp.289-294
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    • 2008
  • A 77 GHz 3-stage low noise amplifier (LNA) employing one common source and two cascode stages is developed using $0.13{\mu}m$ CMOS process. To compensate for the low gain which is caused by lossy silicon substrate and parasitic element of CMOS transistor, positive feedback technique using parasitic inductance of bypass capacitor is adopted to cascode stages. The developed LNA shows gain of 7.2 dB, Sl1 of -16.5 dB and S22 of -19.8 dB at 77 GHz. The return loss bandwidth of LNA is 71.6 to 80.9 GHz (12%). The die size is as small as $0.7mm\times0.8mm$ by using bias line as inter-stage matching networks. This LNA shows possibility of 77 GHz automotive RADAR system using $0.13{\mu}m$ CMOS process, which has advantage in cost compared to sub-100 nm CMOS process.

Cascode GaN HEMT를 적용한 위상 천이 dc-dc 컨버터의 구현 및 문제점 분석 (Implementation and Problem Analysis of Phase Shifted dc-dc Full Bridge Converter with GaN HEMT)

  • 주동명;김동식;이병국;김종수
    • 전력전자학회논문지
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    • 제20권6호
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    • pp.558-565
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    • 2015
  • Gallium nitride high-electron mobility transistor (GaN HEMT) is the strongest candidate for replacing Si MOSFET. Comparing the figure of merit (FOM) of GaN with the state-of-the-art super junction Si MOSFET, the FOM is much better because of the wide band gap characteristics and the heterojunction structure. Although GaN HEMT has many benefits for the power conversion system, the performance of the power conversion system with the GaN HEMT is sensitive because of its low threshold voltage ($V_{th}$) and even lower parasitic capacitance. This study examines the characteristics of a phase-shifted full-bridge dc-dc converter with cascode GaN HEMT. The problem of unoptimized dead time is analyzed on the basis of the output capacitance of GaN HEMT. In addition, the printed circuit board (PCB) layout consideration is analyzed to reduce the negative effects of parasitic inductance. A comparison of the experimental results is provided to validate the dead time and PCB layout analysis for a phase-shifted full-bridge dc-dc converter with cascode GaN HEMT.

디지털 제어 기반의 경계점모드 브릿지리스 PFC 컨버터 (Critical Conduction Mode Bridgeless PFC Converter Based on a Digital Control)

  • 김태훈;이우철
    • 전기학회논문지
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    • 제65권12호
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    • pp.2000-2007
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    • 2016
  • Generally, in order to implement the CRM(Critical Conduction Mode), the analog controller is used rather than a digital controller because the control is simple and uses less power. However, according to the semiconductor technology development and various user needs, digital control system based on a DSP is on the rise. Therefore, in this paper, the CRM bridgeless PFC converter based on a digital control is proposed. It is necessary to detect the inductor current when it reaches zero and peak value, for calculating the on time and off time by using the current information. However, in this paper, the on-time and off-time are calculated by using the proposed algorithm without any current information. If the switching-times are calculated through the steady-state analysis of the converter, they do not reflect transient status such as starting-up. Therefore, the calculated frequency is out of range, and the transient current is generated. In order to solve these problems, limitation method of the on-time and off-time is used, and the limitation values are varied according to the voltage reference. In addition, in steady state, depending on the switching frequency, the inductance is varied because of the resonance between the inductor and the parasitic capacitance of the switching elements. In order to solve the problem, inductance are measured depending on the switching frequency. The measured inductance are used to calculate the switching time for preventing the transient current. Simulation and experimental results are presented to verify the proposed method.

The Role of a Wiring Model in Switching Cell Transients: the PiN Diode Turn-off Case

  • Jedidi, Atef;Garrab, Hatem;Morel, Herve;Besbes, Kamel
    • Journal of Power Electronics
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    • 제17권2호
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    • pp.561-569
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    • 2017
  • Power converter design requires simulation accuracy. In addition to the requirement of accurate models of power semiconductor devices, this paper highlights the role of considering a very good description of the converter circuit layout for an accurate simulation of its electrical behavior. This paper considers a simple experimental circuit including one switching cell where a MOSFET transistor controls the diode under test. The turn-off transients of the diode are captured, over which the circuit wiring has a major influence. This paper investigates the necessity for accurate modeling of the experimental test circuit wiring and the MOSFET transistor. It shows that a simple wiring inductance as the circuit wiring representation is insufficient. An adequate model and identification of the model parameters are then discussed. Results are validated through experimental and simulation results.