A 77 GHz 3-Stage Low Noise Amplifier with Cascode Structure Utilizing Positive Feedback Network using 0.13 μm CMOS Process

A 77 GHz 3-stage low noise amplifier (LNA) employing one common source and two cascode stages is developed using $0.13{\mu}m$ CMOS process. To compensate for the low gain which is caused by lossy silicon substrate and parasitic element of CMOS transistor, positive feedback technique using parasitic inductance of bypass capacitor is adopted to cascode stages. The developed LNA shows gain of 7.2 dB, Sl1 of -16.5 dB and S22 of -19.8 dB at 77 GHz. The return loss bandwidth of LNA is 71.6 to 80.9 GHz (12%). The die size is as small as $0.7mm\times0.8mm$ by using bias line as inter-stage matching networks. This LNA shows possibility of 77 GHz automotive RADAR system using $0.13{\mu}m$ CMOS process, which has advantage in cost compared to sub-100 nm CMOS process.