• 대한기계학회논문집
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• 제19권9호
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• pp.2194-2205
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• 1995

In order to reduce the systematic error of a build-up system, we have proposed a new test procedure in which all force transducers in a build-up system are rotated by 90.deg. with a base platen fixed on a force standard machine. The setting positions of force transducers on the output of a build-up system were investigated using an orthogonal array. The effects of the parallelism of a build-up system and of the bending moment sensitivity of a force transducer were considered. The experimental results show that the setting position of the base platen hardly affects the output of the build-up system, but the setting positions of force transducers affects it strongly. It reveals that the new test procedure reduces effectively the systematic error of a build-up system.

• Journal of applied mathematics & informatics
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• 제11권1_2호
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• pp.305-316
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• 2003

Recently, an iterative algorithm for finding the interior eigenvalues of a definite matrix by CG-type method has been proposed. This method compares to the inverse power method. The given matrices A, and B are assumed to be large and sparse, and SPD( Symmetric Positive Definite) The CG scheme for the optimization of the Rayleigh quotient has been proven a very attractive and promising technique for large sparse eigenproblems for smallest eigenvalue. Also, it is very amenable to parallel computations, like the CG method for the linear systems. A proper choice of the preconditioner significantly improves the convergence of the CG scheme. But for parallel computations we need to find an efficient parallel preconditioner. Our candidates we ILU(0) in the wave-front order, ILU(0) in the multi-coloring order, Point-SSOR(Symmetric Successive Overrelaxation), and Multi-Color Block SSOR preconditioner. Wavefront order is a simple way to increase parallelism in the natural order, and Multi-coloring realizes a parallelism of order(N), where N is the order of the matrix. Another choice is the Multi-Color Block SSOR(Symmetric Successive OverRelaxation) preconditioning. Block SSOR is a symmetric preconditioner which is expected to minimize the interprocessor communication due to the blocking. We implemented the results on the CRAY-T3E with 128 nodes. The MPI (Message Passing Interface) library was adopted for the interprocessor communications. The test problem was drawn from the discretizations of partial differential equations by finite difference methods. The results show that for small number of processors Multi-Color ILU(0) has the best performance, while for large number of processors Multi-Color Block SSOR performs the best.

• 한국전산유체공학회지
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• 제3권1호
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• pp.22-29
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• 1998

Parallel implementation is conducted for a SIMPLER finite volume model. The present parallelism is based on domain decomposition and explicit message passing using MPI and SHMEM. Two parallel solvers to tridiagonal matrix equation are employed. The implementation is verified on the Cray T3E system for a benchmark problem of natural convection in a sidewall-heated cavity. The test results illustrate good scalability of the present parallel models. Performance issues are elaborated in view of convergence as well as conventional parallel overheads and single processor performance. The effectiveness of a localized matrix solution algorithm is demonstrated.

• 전자공학회논문지B
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• 제32B권3호
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• pp.11-23
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• 1995

In this paper, a parallel pipelined processor model which acts as a small VLIW processor architecture and a scheduling algorithm for extracting instruction-level parallelism on this architecture are proposed. The proposed model has a dual-instruction mode which has maximum 4 basic operations being executed in parallel. By combining these basic operations, variable instruction set can be designed for various applications. The scheduling algorithm schedules basic operations for parallel execution and removes pipeline hazards by examining data dependency and resource conflict relations. In order to examine operation and evaluate the performance,a C compiler and a simulator are developed. By simulating various test programs with the compiler and the simulator, the characteristics and the performance result of the proposed architecture are measured.

• Journal of Preventive Medicine and Public Health
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• 제21권2호
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• pp.245-250
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• 1988

For the evaluation of change of FVC and $FEV_1$ after discontinuance of bronchodilator in the coal workers' pneumoconiosis patients, 17 pairs of patients were selected. They were matched by the age(${\pm}5$ y.o.) and the type of ventilatory impairment. Pulmonary function was measured 2 times bimonthly before and after the drug discontinuance discontinued after measurement of PFT for 2 times. In case group the bronchodilator was discontinued after measurement of PFT for 2 times. In control group there was no interruption of medication. FVC, $FEV_1$ decreased in both group as measurement progress. Simple linear regression coefficients against the month of measurement were calculated in both group and tested for parallelism between two groups. The results of test revealed that both regression coefficients were parallel. So in conclusively, discontinuance of medication of bronchodilator for coal workers pneumoconiosis patients has no effect on the decreasing rate of FVC, $FEV_1$.

• 한국기계가공학회지
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• 제8권4호
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• pp.41-47
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• 2009

This research deals with evaluation of machining accuracy for Parallel Kinematic Machine Tool(PKMT) applied parallel type robot system with high precision and stiffness. For this purpose, machine simulation is carried out to foreknow collision and interference between workpiece and tool. Furthermore, on the basis of machine simulation data, PKMT is manufactured. Machining accuracy such as cylindricity straightness, squareness, parallelism circularity, concentricity pitch error and yaw error, is measured by using coordinate measuring machine. Test piece for evaluation of machining accuracy is designed and manufactured under the standard of ISO 10791-7.

• 한국전산구조공학회:학술대회논문집
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• 한국전산구조공학회 2000년도 가을 학술발표회논문집
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• pp.124-132
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• 2000

Distributed processing approach for structural optimization is presented in this study. It is implemented on network of personal computers. The validity and efficiency of this approach are demonstrated and verified by test model of truss. Repeated structural analysis algorithm, which spend a lot of overall structural optimization processes, are based on substructuring scheme with domain-wise parallelism and converted to be adapted to hardware and software environments. The design information data are modularized and assigned to each computer in order to minize the communication cost. The communications between nodes are limited to static condensation and constraint-related data collection.

• 한국산업융합학회 논문집
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• 제22권6호
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• pp.627-635
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• 2019

In this study, we developed for processing complex features using CAM software that satisfies precision for example practice and related qualification tests suiTable for CNC training purposes. In addition, functions such as location control, speed control, and processing path generation, which are the main functions of CNC machining machines, were constructed using small equipment parts, servo motors, inverters, general purpose PCs, and commercial NC software and researched with the goal of developing low-cost education equipment. In the static accuracy inspection, the degree of machine when measuring the parallelism of the X, Y and Z axes and the vibration of the main shaft did not reach the allowable value. However, we have obtained a finished product that satisfies the CNC machine book sample shape machining, detailed functions of the position control function of the CNC machine tool, linear interpolation function, circular interpolation function, and tool offset function. In the qualification test shape processing, a shape with a degree of 1/100 mm was processed to obtain position accuracy that satisfied the tolerance.

• 전기전자학회논문지
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• 제20권3호
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• pp.303-306
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• 2016

본 논문에서는 GPGPU를 활용하여 Convolutional neural network의 가속화 방법을 제안한다. Convolutional neural network는 이미지의 특징 값을 학습하여 분류하는 neural network의 일종으로 대량의 데이터를 학습해야하는 영상 처리에 적합하다. 기존의 Convolutional neural network의 convolution layer는 다수의 곱셈 연산을 필요로 하여 임베디드 환경에서 실시간으로 동작하기에 어려움이 있다. 본 논문에서는 이러한 단점을 해결하기 위하여 winograd convolution 연산을 통하여 곱셈 연산을 줄이고 GPGPU의 SIMT 구조를 활용하여 convolution 연산을 병렬 처리한다. 실험은 ModelSim, TestDrive를 사용하여 진행하였고 실험 결과 기존의 convolution 연산보다 처리 시간이 약 17% 개선되었다.

• 한국정보통신학회논문지
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• 제12권11호
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• pp.2045-2049
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• 2008

본 논문에서는 AMBA 기반으로 사용될 수 있는 H.264용 High Profile Intra Prediction을 구조를 제안한다. 설계된 모듈은 한 매크로 블록 당 최대 306 cycle내에 동작한다. 제안된 Encoder 구조를 검증하기 위하여 JM 13.2로부터 reference C를 개발하였으며, reference C로부터 test vector를 추출하여 설계된 회로를 검증하였다. 우리는 Hardware cost를 줄이기 위하여 plan mode를 제거 하였고, SAD 계산 방법과 8 pixel 병렬처리 등을 사용하여 Hardware cost와 cycle을 줄이는 방법을 채택하였다. 제안된 회로는 Full HD1080@fps 영상을 133MHz clock에서 동작시킬 수 있으며, 합성결과 TSMC 0.18um 공정에 램 포함 25만gate크기 이다.