• Computers and Concrete
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• v.21 no.3
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• pp.321-333
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• 2018

Flat-slabs, being a significant structural component, not only reduce the dead load of the structure but also reduce the amount of concrete required for construction. Moreover the use of recycled aggregates lowers the impact of large scale construction to nearby ecosystems. Recycled aggregate based concrete being a quasi-brittle material shows enormous cracking during failure. Crack growth in flat-slabs is mostly in sliding mode (Mode II). Therefore sufficient sections need to be provided for resistance against such failure modes. The main objective of the paper is to numerically determine the ultimate load carrying capacity of two self-similar flat-slab specimens and validate the results experimentally for the natural aggregate as well as recycled aggregate based concrete. Punching shear experiments are carried out on circular flat-slab specimen on a rigid circular knife-edge support built out of both normal (NAC) and recycled aggregate concrete (RAC, with full replacement). Uniaxial compression and bending tests have been conducted on cubes, cylinders and prisms using both types of concrete (NAC and RAC) for its material characterization and use in the numerical scheme. The numerical simulations have been conducted in ABAQUS (a known finite element software package). Eight noded solid elements have been used to model the flat slab and material properties have been considered from experimental tests. The inbuilt Concrete Damaged Plasticity model of ABAQUS has been used to monitor crack propagation in the specimen during numerical simulations.

• Journal of the Korean Society for Nondestructive Testing
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• v.10 no.2
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• pp.43-49
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• 1990

Ultrasonic testing is one of the most useful NDT method for detection of microdefect in the opaque materials. Recently, many applications of the ultrasonic techniques have been extended widely in the new field like electron is and advanced materials. From the result of the experiment, we have hardly found out a crack in the internal parts of the resin and a delamination between chip and resin because of poor performance of the system.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.1
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• pp.1-10
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• 2018

Recently, there has been rapid development in the field of flexible electronic devices, such as organic light emitting diodes (OLEDs), organic solar cells and flexible sensors. Encapsulation process is added to protect the flexible electronic devices from exposure to oxygen and moisture in the air. Using numerical simulation, we investigated the effects of the encapsulation layer on mechanical stability of the silicon chip, especially the fracture performance of center crack in multi-layer package for various loading condition. The multi-layer package is categorized in two type - a wide chip model in which the chip has a large width and encapsulation layer covers only the chip, and a narrow chip model in which the chip covers both the substrate and the chip with smaller width than the substrate. In the wide chip model where the external load acts directly on the chip, the encapsulation layer with high stiffness enhanced the crack resistance of the film chip as the thickness of the encapsulation layer increased regardless of loading conditions. In contrast, the encapsulation layer with high stiffness reduced the crack resistance of the film chip in the narrow chip model for the case of external tensile strain loading. This is because the external load is transferred to the chip through the encapsulation layer and the small load acts on the chip for the weak encapsulation layer in the narrow chip model. When the bending moment acts on the narrow model, thin encapsulation layer and thick encapsulation layer show the opposite results since the neutral axis is moving toward the chip with a crack and load acting on chip decreases consequently as the thickness of encapsulation layer increases. The present study is expected to provide practical design guidance to enhance the durability and fracture performance of the silicon chip in the multilayer package with encapsulation layer.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.12
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• pp.261-267
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• 2020

The demand for faster, lighter, and thinner portable electronic devices has brought about a change in semiconductor packaging technology. In response, a stacked chip-scale package(SCSP) is used widely in the assembly industry. One of the key materials for SCSP is a die-attach film (DAF). Excellent flowability is needed for DAF for successful die attachment without voids. For DAF with high flowability, two-step curing is often required to reduce a cure crack, but one-step curing is needed to reduce the processing time. In this study, DAF composition was categorized into three groups: cure (epoxy resins), soft (rubbers), hard (phenoxy resin, silica) component. The effect of the composition on a cure crack was examined when one-step curing was applied. The die-attach void and flowability were also assessed. The cure crack decreased as the amount of hard components decreased. Die-attach voids also decreased as the amount of hard components decreased. Moreover, the decrease in cure component became important when the amount of hard component was small. The flowability was evaluated using high-temperature storage modulus and bleed-out. A decrease in the amount of hard components was critical for the low storage modulus at 100℃. An increase in cure component and a decrease in hard component were important for the high bleed-out at 120℃(BL-120).

• Journal of the Microelectronics and Packaging Society
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• v.13 no.4
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• pp.1-7
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• 2006

A major failure mode for wafer level chip size package (WLCSP) is thermo-mechanical fatigue of solder joints. The mechanical strains and stresses generated by the coefficient of thermal expansion (CTE) mismatch between the die and printed circuit board (PCB) are usually the driving force for fatigue crack initiation and propagation to failure. In a WLCSP process peripheral or central bond pads from the die are redistributed into an area away using an insulating polymer layer and a redistribution metal layer, and the insulating polymer layer affects solder joints reliability by absorption of stresses generated by CTE mismatch. In this study, several insulating polymer materials were applied to WLCSP to investigate the effect of insulating material. It was found that the effect of property of insulating material on WLCSP reliability was altered with a solder ball layout of package.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.49-60
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• 2010

Semiconductor packages are increasingly moving toward miniaturization, lighter and high performance. Futhermore, packages become thinner. Thin packages will generate serious reliability problems such as warpage, crack and other failures. Reliability problems are mainly caused by the CTE mismatch of various package materials. Therefore, proper selection of the package materials and geometrical optimization is very important for controlling the warpage and the stress of the package. In this study, we investigated the characteristics of the warpage and the stress of several packages currently used in mobile devices such as CABGA, fcSCP, SCSP, and MCP. Warpage and stress distribution are analyzed by the finite element simulation. Key material properties which affect the warpage of package are investigated such as the elastic moduli, CTEs of EMC molding and the substrate. Geometrical effects are also investigated including the thickness or size of EMC molding, silicon die and substrate. The simulation results indicate that the most influential factors on warpage are EMC molding thickness, CTE of EMC, elastic modulus of the substrate. Simulation results show that warpage is the largest for SCSP. In order to reduce the warpage, DOE optimization is performed, and the optimization results show that warpage of SCSP becomes $10{\mu}m$.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.2
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• pp.35-41
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• 2011

Recently, board level solder joint reliability performance of IC packages during drop impact becomes a great concern to semiconductor and electronic product manufacturers. The handheld electronic products are prone to being dropped during their useful service life because of their size and weight. The IC packages are susceptible to solder joint failures, induced by a combination of printed circuit board (PCB) bending and mechanical shock during impact. The board level drop testing is an effective method to characterize the solder joint reliability performance of miniature handheld products. In this paper, applying the JEDEC (JESD22-B111) standard present a finite element modeling of the FBGA. The simulation results revealed that maximum stress was located at the outermost solder ball in the PCB or IC package side, which consisted well with the location of crack initiation observed in the failure analysis after drop reliability tests.

• Journal of Applied Reliability
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• v.13 no.3
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• pp.207-216
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• 2013

This paper, we classified LED failure mechanisms that occur due to the delamination and analyzed each of the mechanism that gives the LED PKGs the effect. Usually, the LED is composed of several materials which are LED chips, gold wire, phosphor, epoxy resin, adhesive, reflector and lead frame. These different materials are usually delaminated in trouble conditions which are huge temperature difference, hot and humid or mechanical shocked. When the components are delaminated, a luminance will be lost and moisture be absorbed easily, a thermal resistance be increased attendantly. In this paper, we experimented to investigate failure mechanism of the thermal resistance and failure mechanism of the decrease of luminance that occur due to the delamination. A thermal shock test was performed to reproduce this phenomena by subjecting samples to a cold-hot cyclling process between $-30^{\circ}C$(15min) and $110^{\circ}C$(15min). The samples were inspected at 200, 600 and 1,000 cycles. We measured feature of LED using the spatial analyzer, optical microscope, thermal resistance, photometer, scanning electron microscope (SEM). As a result, the progression of the crack and the thermal resistance and decrease in luminance are proportional to number of thermal shock.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.2
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• pp.31-43
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• 2019

In this study, polymer elastic bumps were fabricated for the flexible electronic package flip chip bonding and the viscoelastic and viscoplastic behavior of the polymer elastic bumps according to the temperature and load were analyzed using FEM and experiments. The polymer elastic bump is easy to deform by the bonding load, and it is confirmed that the bump height flatness problem is easily compensated and the stress concentration on thin chip is reduced remarkably. We also develop a spiral cap type and spoke cap type polymer elastic bump of $200{\mu}m$ diameter to complement Au metal cap crack phenomenon caused by excessive deformation of polymer elastic bump. The proposed polymer elastic bumps could reduce stress of metal wiring during bump deformation compared to metal cap bump, which is completely covered with metal wiring because the metal wiring on these bumps is partially patterned and easily deformable pattern. The spoke cap bump shows the lowest stress concentration in the metal wiring while maintaining the low contact resistance because the contact area between bump and pad was wider than that of the spiral cap bump.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.21 no.9
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• pp.1357-1363
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• 1997

Currently it is increasing to use th bonded dissimilar materials in the various field of advanced engineering such as the highly rigid and lighter vehicle, plastic molding LSI package and metal/ceramic bonded joint. In spite of such a wide application of the bonded dissimilar materials, the evaluation method of the bonding strength has not been established yet. Therefore in this paper we analyze the interface crack problem by introducing fracture mechanics parameters as the basic research about estimating of the strength of adhesive joints. The variation of stress intensity factor according to the elastic modulus of adherend and thickness of bonded layer are investigated. Numerical results are based on the results of boundary element analysis of four different type butt joints subjected to uniaxial tension loading.