• Title/Summary/Keyword: package crack

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Characteristics of Laser Wafer Dicing (레이저를 이용한 웨이퍼 다이싱 특성)

  • Lee, Young-Hyun;Choi, Kyung-Jin;Yoo, Seung-Ryeol
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.3 s.16
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    • pp.5-10
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    • 2006
  • This paper investigates cutting qualities after laser dicing and predicts the problems that can be generated by laser dicing. And through 3 point bending test, die strength is measured and the die strength after laser dicing is compared with the die strength after mechanical sawing. Laser dicing is chiefly considered as an alternative to overcome the defects of mechanical sawing such as chipping on the surface and crack on the back side. Laser micromachining is based on the thermal ablation and evaporation mechanism. As a result of laser dicing experiments, debris on the surface of wafer is observed. To eliminate the debris and protect the surface, an experiment is done using a water soluble coating material and ultrasonic. The consequence is that most of debris is removed. But there are some residues around the cutting line. Unlike mechanical sawing, chipping on the surface and crack on the back side is not observed. The cross section of cutting line by laser dicing is rough as compared with that by mechanical sawing. But micro crack can not be seen. Micro crack reduces die strength. To measure this, 3 point bending test is done. The die strength after laser dicing decreases to a half of the die strength after mechanical sawing. This means that die cracking during package assembly can occur.

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Research of the crack problem of a functionally graded layer

  • Murat Yaylaci;Ecren Uzun Yaylaci;Muhittin Turan;Mehmet Emin Ozdemir;Sevval Ozturk;Sevil Ay
    • Steel and Composite Structures
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    • v.50 no.1
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    • pp.77-87
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    • 2024
  • In this study, the two-dimensional crack problem was investigated by using the finite element method (FEM)-based ANSYS package program and the artificial neural network (ANN)-based multilayer perceptron (MLP) method. For this purpose, a half-infinite functionally graded (FG) layer with a crack pressed through two rigid blocks was analyzed using FEM and ANN. Mass forces and friction were neglected in the solution. To control the validity of the crack problem model exercised, the acquired results were compared with a study in the literature. In addition, FEM and ANN results were checked using Root Mean Square Error (RMSE) and coefficient of determination (R2), and a well agreement was found. Numerical solutions were made considering different geometric parameters and material properties. The stress intensity factor (SIF) was examined for these values, and the results were presented. Consequently, it is concluded that the considered non-dimensional quantities have a noteworthy influence on the SIF. Also FEM and ANN can be logical alternative methods to time-consuming analytical solutions if used correctly.

Multi-Scale Heterogeneous Fracture Modeling of Asphalt Mixture Using Microfabric Distinct Element Approach

  • Kim Hyun-Wook;Buttler William G.
    • International Journal of Highway Engineering
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    • v.8 no.1 s.27
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    • pp.139-152
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    • 2006
  • Many experimental and numerical approaches have been developed to evaluate paving materials and to predict pavement response and distress. Micromechanical simulation modeling is a technology that can reduce the number of physical tests required in material formulation and design and that can provide more details, e.g., the internal stress and strain state, and energy evolution and dissipation in simulated specimens with realistic microstructural features. A clustered distinct element modeling (DEM) approach was implemented In the two-dimensional particle flow software package (PFC-2D) to study the complex behavior observed in asphalt mixture fracturing. The relationship between continuous and discontinuous material properties was defined based on the potential energy approach. The theoretical relationship was validated with the uniform axial compression and cantilever beam model using two-dimensional plane strain and plane stress models. A bilinear cohesive displacement-softening model was implemented as an intrinsic interface and applied for both homogeneous and heterogeneous fracture modeling in order to simulate behavior in the fracture process zone and to simulate crack propagation. A disk-shaped compact tension test (DC(T)) with heterogeneous microstructure was simulated and compared with the experimental fracture test results to study Mode I fracture. The realistic arbitrary crack propagation including crack deflection, microcracking, crack face sliding, crack branching, and crack tip blunting could be represented in the fracture models. This micromechanical modeling approach represents the early developmental stages towards a 'virtual asphalt laboratory,' where simulations of laboratory tests and eventually field response and distress predictions can be made to enhance our understanding of pavement distress mechanisms, such its thermal fracture, reflective cracking, and fatigue crack growth.

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A Study on the Inner Defect Inspection for Semiconductor Package by ESPI (ESPI를 이용한 반도체 패키지 내부결함 검사에 관한 연구)

  • Jung, Seung-Tack;Kim, Koung-Suk;Yang, Seung-Pil;Jung, Hyun-Chul;Lee, You-Hwang
    • Proceedings of the KSME Conference
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    • 2003.11a
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    • pp.1442-1447
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    • 2003
  • Computer is a very powerful machine which is widely using for data processing, DB construction, peripheral device control, image processing etc. Consequently, many researches and developments have progressed for high performance processing unit, and other devices. Especially, the core units such as semiconductor parts are rapidly growing so that high-integration, high-performance, microminiat turization is possible. The packaging in the semiconductor industry is very important technique to de determine the performance of the system that the semiconductor is used. In this paper, the inspection of the inner defects such as delamination, void, crack, etc. in the semiconductor packages is studied. ESPI which is a non-contact, non-destructive, and full-field inspection method is used for the inner defect inspection and its results are compared with that of C-Scan method.

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Measurement of Deformations in Micro-Area Using High Resolution AFM Scanning Moiré Technique (고분해능 원자 현미경 스캐닝 무아레 기법을 이용한 미소 영역의 변형량 측정)

  • Park, Jin-Hyoung;Lee, Soon-Bok
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.31 no.6 s.261
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    • pp.659-664
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    • 2007
  • $Moire\'{e}$ interferometry is a useful technique to assess the reliability of electronic package because $Moire\'{e}$ interferometry can measure the whole-field and real-time deformations. The shear strain of a small crack site is important to the reliability assessment of electronic package. The optical limitation of $Moire\'{e}$ interferometry makes ambiguous the shear strain of a small area. An atomic force microscope (AFM) is used to measure the profile of a micro site. High resolution of AFM can apply to the $Moire\'{e}$ technique. AFM $Moire\'{e}$ technique is useful to measure the shear strain of a small area. In this research, the method to accurately measure the deformation of a small area by using AFM $Moire\'{e}$ is proposed. A phase-shifting method is applied to improve the resolution of AFM $Moire\'{e}$.

Reliability Evaluation of Semiconductor using Ultrasound (초음파를 이용한 반도체의 신뢰성 평가)

  • Jang, Hyo-Seong;Ha, Job;Jhang, Kyung-Young
    • Journal of the Korean Society for Nondestructive Testing
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    • v.21 no.6
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    • pp.598-606
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    • 2001
  • Recently, semiconductor packages trend to be thinner, which makes difficult to detect defects therein. A preconditioning test is generally performed to evaluate the reliability of semiconductor packages. The test procedure includes two scanning acoustic microscope (SAM) tests at the beginning and end of the entire test, in order to help detect physical defects such as delaminations and package cracks. In particular, of primary concern are package cracks and delaminations caused by moisture absorbed under ambient conditions. This paper discusses the failure mechanism associated with the moisture absorbed and encapsulated in semiconductors, and the use SAM to detect failures such as tracks and delaminations grown during the preconditioning test.

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Characteristics of Reliability for Flip Chip Package with Non-conductive paste (비전도성 접착제가 사용된 플립칩 패키지의 신뢰성에 관한 연구)

  • Noh, Bo-In;Lee, Jong-Bum;Won, Sung-Ho;Jung, Seung-Boo
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.4
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    • pp.9-14
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    • 2007
  • In this study, the thermal reliability on flip chip package with non-conductive pastes (NCPs) was evaluated under accelerated conditions. As the number of thermal shock cycle and the dwell time of temperature and humidity condition increased, the electrical resistance of the flip chip package with NCPs increased. These phenomenon was occurred by the crack between Au bump and Au bump and the delamination between chip or substrate and NCPs during the thermal shock and temperature and humidity tests. And the variation of electrical resistance during temperature and humidity test was larger than that during thermal shock test. Therefore it was identified that the flip chip package with NCPs was sensitive to environment with moisture.

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Evaluation Method of Bonded Strength Considering Stress Singularity in Adhesively Bonded Joints (응력특이성을 고려한 접착이음의 강도평가 방법)

  • 정남용
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.7 no.1
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    • pp.58-68
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    • 1998
  • Advantages of adhesively bonded joints and techniques of weight reduction have led to increasing use of structural adhesives such as LSI(large scale integration) package, automobile, aircraft in the various industries. In spite of such wide applications of adhesively bonded joints, the evaluation method of bonding strength has not been established. Stress singularity occurs at the interface edges of adhesively bonded joints and it is required to analyze it. In this paper, the stress singularity using 2-dimensional elastic boundary element method (BEM) with the changes of the lap length and adhesive for single lap joint was analyzed, and experiments of strength evaluation were carried out. As the results, the evaluating method of bonding strength considering stress singularity at interface edges of adhesively bonded joints and stress intensity factor of interface crack have been proposed in static and fatigue test.

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The Intelligence Algorithm of Semiconductor Package Evaluation by using Scanning Acoustic Tomograph (Scanning Acoustic Tomograph 방식을 이용한 지능형 반도체 평가 알고리즘)

  • Kim J. Y.;Kim C. H.;Song K. S.;Yang D. J.;Jhang J. H.
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2005.05a
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    • pp.91-96
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    • 2005
  • In this study, researchers developed the estimative algorithm for artificial defects in semiconductor packages and performed it by pattern recognition technology. For this purpose, the estimative algorithm was included that researchers made software with MATLAB. The software consists of some procedures including ultrasonic image acquisition, equalization filtering, Self-Organizing Map and Backpropagation Neural Network. Self-Organizing Map and Backpropagation Neural Network are belong to methods of Neural Networks. And the pattern recognition technology has applied to classify three kinds of detective patterns in semiconductor packages: Crack, Delamination and Normal. According to the results, we were confirmed that estimative algorithm was provided the recognition rates of $75.7\%$ (for Crack) and $83_4\%$ (for Delamination) and $87.2\%$ (for Normal).

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Numerical Analysis of Warpage and Stress for 4-layer Stacked FBGA Package (4개의 칩이 적층된 FBGA 패키지의 휨 현상 및 응력 특성에 관한 연구)

  • Kim, Kyoung-Ho;Lee, Hyouk;Jeong, Jin-Wook;Kim, Ju-Hyung;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.2
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    • pp.7-15
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    • 2012
  • Semiconductor packages are increasingly moving toward miniaturization, lighter and multi-functions for mobile application, which requires highly integrated multi-stack package. To meet the industrial demand, the package and silicon chip become thinner, and ultra-thin packages will show serious reliability problems such as warpage, crack and other failures. These problems are mainly caused by the mismatch of various package materials and geometric dimensions. In this study we perform the numerical analysis of the warpage deformation and thermal stress of 4-layer stacked FBGA package after EMC molding and reflow process, respectively. After EMC molding and reflow process, the package exhibits the different warpage characteristics due to the temperature-dependent material properties. Key material properties which affect the warpage of package are investigated such as the elastic moduli and CTEs of EMC and PCB. It is found that CTE of EMC material is the dominant factor which controls the warpage. The results of RSM optimization of the material properties demonstrate that warpage can be reduced by $28{\mu}m$. As the silicon die becomes thinner, the maximum stress of each die is increased. In particular, the stress of the top die is substantially increased at the outer edge of the die. This stress concentration will lead to the failure of the package. Therefore, proper selection of package material and structural design are essential for the ultra-thin die packages.