• Journal of Information Display
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• v.6 no.4
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• pp.6-10
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• 2005

The dependence of hysteresis characteristics in low temperature poly-Si (LTPS) thin film transistors (TFTs) on the gate-source voltage (Vgs) or the drain-source voltage (Vds) bias is investigated and discussed. The hysteresis levels in both p-type and n-type LTPS TFTs are independent of Vds bias but increase as the sweep range of Vgs increases. It has been found that the hysteresis in both p-type and n-type LTPS TFTs originated from charge trapping and de-trapping in the channel region rather than at the source/drain edges.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.620-621
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• 2008

Transparent electronics has been one of the key terminologies forecasting the ubiquitous technology era. Several researchers have thus extensively developed transparent oxide-based thin-film transistors (TFTs) on glass and plastic substrates although in general high voltage operating devices have been mainly studied considering transparent display drivers. However, low voltage operating oxide TFTs with transparent electrodes are very necessary if we are aiming at logic circuit applications, for which transparent complementary or one-type channel inverters are required. The most effective and low power consuming inverter should be a form of complementary p-channel and n-channel transistors but real application of those complementary TFT inverters also requires electrical- and even photo-stabilities. Since p-type oxide TFTs have not been developed yet, we previously adopted organic pentacene TFTs for the p-channel while ZnO TFTs were chosen for n-channel on sputter-deposited $AlO_x$ film. As a result, decent inverting behavior was achieved but some electrical gate instability was unavoidable at the ZnO/$AlO_x$ channel interface. Here, considering such gate instability issues we have designed a unique transparent complementary TFT (CTFTs) inverter structure with top n-ZnO channel and bottom p-pentacene channel based on 12 nm-thin nano-oxide/self assembled monolayer laminated dielectric, which has a large dielectric strength comparable to that of thin film amorphous $Al_2O_3$. Our transparent CTFT inverter well operate under 3 V, demonstrating a maximum voltage gain of ~20, good electrical and even photoelectric stabilities. The device transmittance was over 60 % and this type of transparent inverter has never been reported, to the best of our limited knowledge.

• Journal of Information Display
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• v.12 no.1
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• pp.61-67
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• 2011

A single-clock-driven shift register and a two-stage buffer are proposed, using p-type, low-temperature polycrystalline silicon thin-film transistors. To eliminate the clock skew problems and to reduce the burden of the interface, only one clock signal was adopted to the shift register circuit, without additional reference voltages. A two-stage, p-type buffer was proposed to drive the gate line load and shows a full-swing output without threshold voltage loss. The shift register and buffer were designed for the 3.31" WVGA ($800{\times}480$) LCD panel, and the fabricated circuits were verified via simulations and measurements.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.999-1002
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• 2004

We propose and simulate a new integrated DAC analog buffer composed of only p-type poly-Si TFTs in AMLCD and AMOLED. Proposed circuit employs a voltage level shifter which $V_{OUT}$ has a linear functional relation to $V_{IN}$. The proposed scheme enables to allow a constant $V_{GS}$ of buffer transistor so that the charging speed of pixel data address is improved.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.239-242
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• 2008

We have investigated the reliability of short channel ($L=1.5{\mu}m$) p-type ELA poly-Si TFTs under hot carrier stress. Threshold voltage of short channel TFT was significantly more shifted to positive direction than that of long channel TFT under the same stress. This result may be attributed to electron trapping at the interface between poly-Si film and gate oxide layer.

• Journal of the Korean Applied Science and Technology
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• v.29 no.2
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• pp.199-204
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• 2012

Organic thin-film transistors (OTFTs) have received considerable attention because their potential applications for nano-scale thin-film structures have been widely researched for large-scale integration industries, such as semiconductors and displays. However, research in developing n-type materials and devices has been relatively shortage than developing p-type materials. Therefore, we report on the fabrication of top-contact [6,6]-phenyl-C61-butyricacidmethylester (PCBM) TFTs by using three different solvent, o-dichlorobenzene, toluene and chloroform. An appropriate choice of solvent shows that the electrical characteristics of PCBM TFTs can be improved. Moreover, our PCBM TFTs with the cross-linked Poly(4-vinylphenol) dielectric layer exhibits the most pronounced improvements in terms of the field-effect mobility (${\sim}0.034cm^2/Vs$) and the on/off current ratio (${\sim}1.3{\times}10^5$) for our results. From these results, it can be concluded that solvent-modification of an organic semiconductor in PCBM TFTs is useful and can be extended to further investigations on the PCBM TFTs having polymeric gate dielectrics. It is expected that process optimizations using solution-processing of organic semiconductor materials will allow the development of the n-type organic TFTs for low-cost electronics and various electronic applications.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.666-672
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• 2014

We have investigated the gate insulator effects on the electrical performance of p-type tin monoxide (SnO) thin-film transistors (TFTs). Various SnO TFTs are fabricated with different gate insulators of a thermal $SiO_2$, a plasma-enhanced chemical vapor deposition (PECVD) $SiO_x$, a $150^{\circ}C$-deposited PEVCD $SiO_x$, and a $300^{\circ}C$-deposited PECVD $SiO_x$. Among the devices, the one with the $150^{\circ}C$-deposited PEVCD $SiO_x$ exhibits the best electrical performance including a high field-effect mobility ($=4.86cm^2/Vs$), a small subthreshold swing (=0.7 V/decade), and a turn-on voltage around 0 (V). Based on the X-ray diffraction data and the localized-trap-states model, the reduced carrier concentration and the increased carrier mobility due to the small grain size of the SnO thin-film are considered as possible mechanisms, resulting in its high electrical performance.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.829-832
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• 2007

A high-speed and accurate analog buffer is proposed for mobile display using LTPS TFTs. The proposed analog buffer is common source type with sampling and negative feedback mode. Therefore, driving speed of the proposed buffer is faster than previously reported one. In addition, the accuracy is very high because of high negative feedback gain. The simulation results show that maximum mischarging voltage of the proposed buffer is 8mV and previously reported one is 37mV. And Power consumption of the proposed buffer is $43.1{\mu}W$, which is 73% of previously reported one.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.11
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• pp.969-975
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• 2002

Thin film transistors(TFT) were made based on the polycrystalline Si (poly-Si) crystallized by sequential lateral solidification(SLS) method. The electrical characteristics of the devices were analyzed. n-type TFTs did not show a superior characteristics compared to p-type TFTs. We analyzed the causes of the failure by focused ion beam(FIB) analysis and automatic spreading resistance(ASR) measurement, to study the structural integrity and the doping distribution, respectively. FIB showed no structural problems but it revealed a non-intermixed layer in the contact holes between the polysilicon and the aluminum electrode. ASR analyses on poly-Si layer with various doping concentrations and activation temperatures showed that the inadequately doped areas were partially responsible for the inferior behavior of the whole device.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.87-88
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• 2006

Recently, poly-Si TFT-LCD starts to be mass produced using excimer laser annealing (ELA) poly-Si. The main reason for this is the good quality poly-Si and large area uniformity. We report the influence of channel length and width on poly-Si TFTs performance. Transfer characteristics of p-channel poly-Si thin film transistors fabricated on polycrystalline silicon (poly-Si) thin film transistors (TFTs) with various channel lengths and widths of 2-30 ${\mu}m$ has been investigated. In this paper, we analyzed the data of p-type TFTs. We studied threshold voltage ($V_{TH}$), on/off current ratio ($I_{ON}/I_{OFF}$), saturation current ($I_{DSAT}$), and transconductance ($g_m$) of p-channel poly-Si thin film transistors with various channel lengths and widths.