• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.31A no.1
• /
• pp.77-83
• /
• 1994

Characteristics of hot-electron-induced degradation by AC, DC was investigated for p-MOSFET's(W/L=25/l$\mu$m) with sub-10nm RTP-CVD gate oxides. It was confirmed that the surface channel p-MOSFET of a thinner gate oxide shows less degradation. Mechanisms for this effect were analyzed using a simple MOS Device degradation model. It was found that the number of generated electron traps(fixed charge) is determined by the amount of peak gate current, dependent of the gate oxide thickness, and the major cause of the smaller degradation in the thinner gate oxide devices is the lower hot electron trapping carriers.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.28 no.11
• /
• pp.698-703
• /
• 2015

In this study, we fabricated the dual gate (DG) ion-sensitive field-effect-transistor (ISFET) with flexible polyimide (PI) extended gate (EG). The DG ISFETs significantly enhanced the sensitivity of pH in electrolytes from 60 mV/pH to 1152.17 mV/pH and effectively improved the drift and hysteresis phenomenon. This is attributed to the capacitive coupling effect between top gate and bottom gate insulators of the channel in silicon-on-transistor (SOI) metal-oxide-semiconductor (MOS) FETs. Accordingly, it is expected that the PI-EG based DG-ISFETs is promising technology for high-performance flexible biosensor applications.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.17 no.8
• /
• pp.799-805
• /
• 2004

Two dimensional MEDICI simulator is used to study the characteristics of latch-up current of Dual Gate Emitter Switched Thyristor. The simulation is done in terms of the current-voltage characteristics, latch-up current density, ON-voltage drop and electrical property with the variations of p-base impurity concentrations. Compared with the other power devices such as MOS Controlled Cascade Thyristor(MCCT), Conventional Emitter Switched Thyristor(C-EST) and Dual Channel Emitter Switched Thyristor(DC-EST), Dual Gate Emitter Switched Thyristor(DG-EST) shows to have the better electrical characteristics, which is the high latch-up current density and low forward voltage-drop. The proposed DG-EST which has a non-planer p-base structure under the floating $N^+$ emitter indicates to have the better characteristics of latch-up current and breakover voltage.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1996.11a
• /
• pp.113-116
• /
• 1996

The drain current of the MOSFET in the off state(i.e., Id when Vgs=0V) is undesired but nevertheless important leakage current device parameter in many digital CMOS IC applications (including DRAMs, SRAMs, dynamic logic circuits, and portable systems). The standby power consumed by devices in the off state have added to the total power consumed by the IC, increasing heat dissipation problems in the chip. In this paper, hot-carrier-induced degra- dation and gate-induced-drain-leakage curr- ent under worse case in P-MOSFET\`s have been studied. First of all, the degradation of gate-induced- drain-leakage current due to electron/hole trapping and surface electric field in off state MOSFET\`s which has appeared as an additional constraint in scaling down p-MOSFET\`s. The GIDL current in p-MOSFET\`s was decreased by hot-electron stressing, because the trapped charge were decreased surface-electric-field. But the GIDL current in n-MOS77T\`s under worse case was increased.

• Journal of Korean Physical Therapy Science
• /
• v.13 no.1
• /
• pp.29-38
• /
• 2006

The purpose of this study lies in finding out the effect that variation of pain and body deflection posture has an influence on the static spinal stabilization after having performed spinal stabilization exercise making degenerative disc disease patients an object over 8 weeks using $CENTAUR^{(R)}$, 3-D spinal stabilization training implement. Subjects : 61 of DDD patients were made as an object of this study (mean age: 45.46 years, SD: ${\pm}12.78$, range: 16-68), their average height was 161.87cm, average weight 60.70kg, 12 males and 49 females were involved. Methods: 8 various investigations were performed and varied values were compared with reinvestigation done after having exercised 8 weeks using 3-D $CENTAUR^{(R)}$. We used VAS(Visual Analog Scale) in order to see the variation of pain intensity, MOS(Modified Oswestry Scale) in order to see activities of daily life. Results VAS was lessened from 7.50 to 2.71, limitation of routine life(MOS) from 20.26 to 9.32, there were remarkable differences statistically(p<0.05). As a result of muscular investigation for static spinal stabilization by 8 variations of body deflection, muscular strength were all increased and there were remarkable differences statistically(p<0.05). Conclusions : It has been turned out that pain and limitation of daily life was lessened as a result of making 61 of degenerative disc disease patients exercised 8 weeks using $CENTAUR^{(R)}$, 3-D spinal stabilization training implement, deep muscular power was increased. Thus it has been turned out that 3-D lumbar stabilization exercise has an effect on the spinal muscles strengthening and alleviation of their pain for degenerative disc disease.

• Korean Journal of Materials Research
• /
• v.5 no.1
• /
• pp.3-11
• /
• 1995

$(TiO_{2})$ thin films were deposited on p-Si(100) substrate by APMOCVD using titanium isopropoxide as a source material. The deposition mechanism was well explained by the simple boundary layer theory and the apparent activation energy of the chemical reaction controlled process was 18.2kcal /mol. The asdeposited films were polycrystalline anatase phase and were transformed into rutile phase after postannealing. The postannealing time and the film thikness as well as the postannealing temperature also affected the phase transition. The C-V plot exhibited typical charateristics of MOS diode, from which the dielectric constant of about 80 was obtained. The capacitance of the annealed film was decreased but those of the Nb or Sr doped films were not changed. I-V characteristics revealed that the conduction mechanism was hopping conduction. The postannealing and the doping of Nb or Sr cause to decrease the leakage current and to increase the breakdown voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.48 no.4
• /
• pp.32-38
• /
• 2011

This paper describes implementation of the 5.0GHz RF frequency synthesizer with 0.18${\mu}m$ silicon CMOS technology being used as an application of the IEEE802.15.4 USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with ${\Sigma}-{\Delta}$ modulator, and common circuits of the PLL has been optimized. Especially to get excellent performance of high speed and wide tuning range, N-P MOS core structure and 12 step cap banks have been used in design of the VCO. The chip area including pads for testing is $1.1{\times}0.7mm^2$, and the chip area only core for IP in SoC is $1.0{\times}0.4mm^2$. Through analysing of the fabricated frequency synthesizer, we can see that it has wide operation range and excellent frequency characteristics.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.5
• /
• pp.49-54
• /
• 2009

This paper describes implementation of the 1.9GHz RF frequency synthesizer with $0.18{\mu}m$ silicon CMOS technology being used as an application of the USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with ${\Sigma }-{\Delta}$ modulator, and common circuits of the PLL has been optimized. Especially to get good performance of speed, power consumption, and wide tuning range, N-P MOS core structure has been used in design of the VCO. The chip area including pads for testing is $1.2{\times}0.7mm^2$, and the chip area only core for IP in SoC is $1.1{\times}0.4mm^2$. The test results show that there is no special spurs except -63.06dB of the 6MHz reference spurs in the PLL circuitry. There is good phase noise performance like -116.17dBc/Hz in 1MHz offset frequency.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.45 no.6
• /
• pp.87-93
• /
• 2008

This paper describes implementation of the 5.0GHz RF frequency synthesizer with $0.18{\mu}m$ silicon CMOS technology being used as an application of the IEEE802.15.4 USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with ${\Sigma}-{\Delta}$ modulator, and common circuits of the PLL has been optimized. Especially to get good performance of speed, power consumption, and wide tuning range, N-P MOS core structure has been used in design of the VCO. The chip area including pads for testing is $1.1*0.7mm^2$, and the chip area only core for IP in SoC is $1.0*0.4mm^2$. Through comparing and analysing of the designed two kind of the frequency synthesizer, we can conclude that if we improve a litter characteristics there is no problem to use their as IPs.

• The Korean Journal of Pain
• /
• v.34 no.2
• /
• pp.217-228
• /
• 2021

Background: The purpose of this study was to assess the effectiveness of transcutaneous electrical nerve stimulation (TENS) in chronic low back pain and neuropathic pain. Methods: Seventy-four patients aged 18-65 with chronic low back pain were included in the study. Baseline measurements were performed, and patients were randomized into three groups. The first group received burst TENS (bTENS), the second group conventional TENS (cTENS), and the third group placebo TENS (pTENS), all over 15 sessions. Patients' visual analogue scale (VAS) scores were evaluated before treatment (preT), immediately after treatment (postT), and in the third month after treatment (postT3). Douleur Neuropathique 4 Questions (DN4), the Modified Oswestry Low Back Pain Disability Questionnaire (MOS), the Beck Depression Inventory (BDI), and sympathetic skin response (SSR) values were also evaluated preT and postT3. Results: A statistically significant improvement was observed in mean VAS scores postT compared to preT in all three groups. Intergroup comparison revealed a significant difference between preT and postT values, that difference being assessed in favor of bTENS at multiple comparison analysis. Although significant improvement was determined in neuropathic pain DN4 scores measured at postT3 compared to preT in all groups, there was no significant difference between the groups. No statistically significant difference was also observed between the groups in terms of MOS, BDI, or SSR values at postT3 (P > 0.05). Conclusions: bTENS therapy in patients with low back pain is an effective and safe method that can be employed in short-term pain control.