• Journal of the Korean Ceramic Society
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• v.50 no.6
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• pp.439-445
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• 2013

Both an unreinforced $Al_2O_3$/Al matrix and a ${\alpha}-Al_2O_3$ particulate reinforced composite have been produced by the oxidation of an Al surface doped with NaOH in the absence of any other dopant. Fabrication of the matrix was initiated by the formation of $NaAlO_2$, which provides a favorable surface structure for the matrix formation by breaking the protective $Al_2O_3$ layer on Al. During the matrix growth, the external surface of the growth front was covered with a very thin sodium-rich oxide. A cyclic formation process of the sodium-rich oxide on the growth surface was proposed for the sodium-induced directed metal oxidation process. This process involves dissolution of the sodium-rich oxide, motion of Na to the growth front, and re-formation of the oxide on the surface. Near-net-shape composites were fabricated by infiltrating an $Al_2O_3$/Al matrix into a ${\alpha}-Al_2O_3$ particulate preform, without growth barrier materials. The infiltration distance increased almost linearly in the NaOH-doped preform.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.318.1-318.1
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• 2016

Hafnium Oxide (HfOx) has been attracted as a promising gate dielectric for replacing SiO2 in gate stack applications. In this paper, Metal-Oxide-Semiconductor (MOS) capacitor with solution processed HfO2 high-k material as a dielectric were fabricated. The solvent using $HfOCl2{\cdot}8H2O$ dissolve in 2-Methoxy ethanol was prepared at 0.3M. The HfOx layers were deposited on p-type silicon substrate by spin-coating at $250^{\circ}C$ for 5 minutes on a hot plate and repeated the same cycle for 5 times, followed by annealing process at 350, 450 and $550^{\circ}C$ for 2 hours. When the annealing temperature was increased from 350 to $550^{\circ}C$, capacitance value was increased from 337 to 367 pF. That was resulted from the higher temperature of HfOx which have more crystallization phase, therefore dielectric constant (k) was increased from 11 to 12. It leads to the formation of dense HfOx film and improve the ability of the insulator layer. We confirm that HfOx layer have a good performance for dielectric layer in MOS capacitors.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.143.1-143.1
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• 2016

Ge is a promising candidate to replace Si in MOSFET because of its superior carrier mobility, particular that of the hole. However Ge oxide is thermodynamically unstable. At elevated temperature, GeO is formed at the interface of Ge and GeO2, and its formation increases the interface defect density, degrading its device performance. In search for a method to surmount the problem, we investigated Ge oxidation through an inert capped oxide layer. For this work, we prepared low doped n-type Ge(100) wafer by removing native oxide and depositing a capping layer, and show that GeO2 interface can be successfully grown through the capping layer by thermal oxidation in a furnace. The thickness and quality of thus grown GeO2 interface was examined by ellipsometry, XPS, and AFM, along with I-V and C-V measurements performed at 100K to 300K. We will present the result of our investigation, and provide the discussion on the oxide growth rate, interface state density and electrical characteristics in comparison with other studies using the direct oxidation method.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 1999.08a
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• pp.412-422
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• 1999

Scale defects generated on the strip surface in a tandem finishing mill line are collected from the strip trapped among the production mills by freezing the growing scale on the strip by the melt glass coating and shutting down the line simultaneously. The samples observed of its cross sectional figure showed the process of scale defect formation where the defects are formed at the base metal surface by thicker oxidized scale during each rolling passes. The properties of the oxidized layer growth both at rolling and inter-rolling are detected down sized rolling test simulating carefully the rolling condition of the production line. The thickness of the oxidized layer at each rolling pass are simulated numerically. The critical scale thickness to avoid the defect formation is determined through the expression of mutual relation between oxidized layer thickness and the lanks of the strip called quality for the scale defects. The scale growth of scale less than the critical thickness and also to keep the bulk temperature tuning the water flow rate and cooling time appropriately. Two units of Inerstand Cooler are designed and settled among the first three stands in the production line. Two units of scale defect is counted from the recoiled strip and the results showed distinct decrease of the defects comparing to the conventionaly rolled products.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.256-256
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• 2012

Cu가 기존 배선물질인 Al을 대체함에 따라 resistance-capacitance delay와 electromigration (EM) 등의 문제들이 어느 정도 해결되었다. 그러나 지속적인 배선 폭의 감소로 배선의 저항 증가, EM 현상 강화 그리고 stability 악화 등의 문제가 지속적으로 야기되고 있다. 이를 해결하기 위한 방법으로 Cu alloy seed layer를 이용한 barrier 자가형성 공정에 대한 연구를 진행하였다. 이 공정은 Cu 합금을 seed layer로 사용하여 도금을 한 후 열처리를 통해 $SiO_2$와의 계면에서 barrier를 자가 형성시키는 공정이다. 이 공정은 매우 균일하고 얇은 barrier를 형성할 수 있고 별도의 barrier와 glue layer를 형성하지 않아 seed layer를 위한 공간을 추가로 확보할 수 있는 장점을 가지고 있다. 또한, via bottom에 barrier가 형성되지 않아 배선 전체 저항을 급격히 낮출 수 있다. 합금 물질로는 초기 Al이나 Mg에 대한 연구가 진행되었으나, 낮은 oxide formation energy로 인해 SiO2에 과도한 손상을 주는 문제점이 제기되었다. 최근 Mn을 합금 물질로 사용한 안정적인 barrier 형성 공정이 보고 되고 있다. 하지만, barrier 형성을 하기 위해 300도 이상의 열처리 온도가 필요하고 열처리 시간 또한 긴 단점이 있다. 본 실험에서는 co-sputtering system을 사용하여 Cu-V 합금을 형성하였고, barrier를 자가 형성을 위해 300도에서 500도까지 열처리 온도를 변화시키며 1시간 동안 열처리를 실시하였다. Cu-V 공정 조건 확립을 위해 AFM, XRD, 4-point probe system을 이용하여 표면 거칠기, 결정성과 비저항을 평가하였다. Cu-V 박막 내 V의 함량은 V target의 plasma power density를 변화시켜 조절 하였으며 XPS를 통해 분석하였다. 열처리 후 시편의 단면을 TEM으로 분석하여 Cu-V 박막과 $SiO_2$ 사이에 interlayer가 형성된 것을 확인 하였으며 EDS를 이용한 element mapping을 통해 Cu-V 내 V의 거동과 interlayer의 성분을 확인하였다. PVD Cu-V 박막은 기판 온도에 큰 영향을 받았고, 200도 이상에서는 Cu의 높은 표면에너지에 의한 agglomeration 현상으로 거친 표면을 가지는 박막이 형성되었다. 7.61 at.%의 V함량을 가지는 Cu-V 박막을 300도에서 1시간 열처리 한 결과 4.5 nm의 V based oxide interlayer가 형성된 것을 확인하였다. 열처리에 의해 Cu-V 박막 내 V은 $SiO_2$와의 계면과 박막 표면으로 확산하며 oxide를 형성했으며 Cu-V 박막 내 V 함량은 줄어들었다. 300, 400, 500도에서 열처리 한 결과 동일 조성과 열처리 온도에서 Cu-Mn에 의해 형성된 interlayer의 두께 보다 두껍게 성장했다. 이는 V의 oxide formation energy가 Mn 보다 작으므로 SiO2와의 계면에서 산화막 형성이 쉽기 때문으로 판단된다. 또한, $V^{+5}$이온 반경이 $Mn^{+2}$이온 반경보다 작아 oxide 내부에서 확산이 용이하며 oxide 박막 내에 여기되는 전기장이 더 큰 산화수를 가지는 V의 경우 더 크기 때문으로 판단된다.

• Korean Journal of Materials Research
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• v.26 no.3
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• pp.109-116
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• 2016

To achieve the fabrication of high-quality Ag-coated Cu particles through a wet chemical process, we reported herein pretreatment conditions using an ammonium-based mixed solvent for the removal of a $Cu_2O$ layer on Cu particles that were oxidized in air for 1 hr at $200^{\circ}C$ or for 3 days at room temperature. Furthermore, we discussed the results of post-Ag plating with respect to removal level of the oxide layer. X-ray diffraction results revealed that the removal rate of the oxide layer is directly proportional to the concentration of the pretreatment solvent. With the results of Auger electron spectroscopy using oxidized Cu plates, the concentrations required to completely remove 50-nm-thick and 2-nm-thick oxides within 5 min were determined to be X2.5 and X0.13. However, the optimal concentrations in an actual Ag plating process using Cu powder increased to X0.4 and X0.5, respectively, because the oxidation in powder may be accelerated and the complete removal of oxide should be tuned to the thickest oxide layer among all the particles. Back-scattered electron images showed the formation of pure fine Ag particles instead of a uniform and smooth Ag coating in the Ag plating performed after incomplete removal of the oxide layer, indicating that the remaining oxide layer obstructs heterogeneous nucleation and plating by reduced Ag atoms.

• Journal of Korea Foundry Society
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• v.26 no.2
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• pp.92-97
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• 2006

Contact material is widely used as electrical parts. Ag-Cd alloy has a good wear resistance and stable contact resistance. But the disadvantages of Ag-Cd alloy are coarse Cd oxides and harmful metal, Cd. To solve the disadvantages of that, Ag-Sn alloy that has stable and fine Sn oxide at high temperature has been developed. In order to optimize Sn amount that affects the formation of the oxide layer on the surface, we worked for the microstructures and properties of Ag-Sn material fabricated by rapid solidification process. The experimental procedure were melting using high frequency induction, melt spinning, and internal oxidation. We have shown that the optimized Sn amount for high hardness is 7.09 wt%Sn. Surface oxide layer forms when Sn amount is over 9.45 wt%. The size of Sn oxide is 20 nm.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.1
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• pp.93-99
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• 1996

The formation properties and oxidation mechanism of electrochemically oxidized porous silicon(OPS) films have been studied. To examine the humidity-sensitive properties of OPS films, surface-type and bulk-type humidity sensors were fabricated. The oxidized thickness of porous silicon layer(PSL) increases with the charge supplied during electrochemical humidity sensor shows high sensitivity at high relative humidity in low temperature. The sensitivity and linearity can be improved by optimizing a porosity of PSL. (author). refs., figs.

• Korean Journal of Metals and Materials
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• v.46 no.6
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• pp.370-376
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• 2008

The formation of anodic oxide film of titanium (Ti) was studied at a variety of electrolyte concentrations and current density to clarify their effects on morphology, microstructure and composition of Ti oxide layer. For the analysis of the Ti oxide films, a scanning electron microscopy (SEM), X-ray diffractometer (XRD), and X-ray photoelectron spectroscopy (XPS) were used. The results showed that the concentration of phosphoric acid played a crucial role in the crystalline structure of the Ti oxide layer while the current density gave a critical effect on the thickness and diameter of its pore. In particular, the crystalline anatase phase with a thickness larger than $2{\mu}m$, which is quite desirable for a dental implant application, could be readily prepared at the phosphoric acid concentration of 0.5 M and current density higher than $2.0A/dm^2$.

• Bulletin of the Korean Chemical Society
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• v.20 no.9
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• pp.1049-1055
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• 1999

Electrochemical oxidation of silicon (p-type Si(100)) at room temperature in ethylene glycol and in aqueous solutions has been performed by applying constant low current densities for the preparation of thin SiO2 layers. In-situ ac impedance spectroscopic methods have been employed to characterize the interfaces of electrolyte/oxide/semiconductor and to estimate the thickness of the oxide layer. The thicknesses of SiO2 layers calculated from the capacitive impedance were in the range of 25-100Å depending on the experimental conditions. The anodic polarization resistance parallel with the oxide layer capacitance increased continuously to a very large value in ethylene glycol solution. However, it decreased above 4 V in aqueous solutions, where oxygen evolved through the oxidation of water. Interstitially dissolved oxygen molecules in SiO2 layer at above the oxygen evolution potential were expected to facilitate the formation of SiO2 at the interfaces. Thin SiO2 films grew efficiently at a controlled rate during the application of low anodization currents in aqueous solutions.