• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.515-518
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• 2002

In this paper, we demonstrate the impact of oxide interface-state on low temperature poly-Si TFTs. The TFTs with interface-state exhibit poor performance and serious degradation under hot carrier and gate bias stress. Our results indicate that the worse oxide integrity cause initial characteristic shift and device instability.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.203-203
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• 2009

Low temperature annealing for oxide TFTs including IGZO on PI substrate is the essential process to fabricate flexible display devices, since low heat-resistance on PI and PEN substrates limits the temperature range. Laser annealing is one of the promising candidates for low temperature process, and it has been used for various application in semiconductor and LCD fabrication. We irradiated laser to solution-based IGZO thin films on PI substrate were irradiated to laser beam, and investigated laser damage of PI layer. Based on transmittance analysis, wavelength(532nm) and scan speed(1000mm/s) is the optimized condition for laser irradiation about ink-Jet printed oxide TFTs on PI substrates.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.05a
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• pp.13.1-13.1
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• 2009

Transparent electronics has attracted many interests, for it can open new applications for consumer electronics, transportation, business, and military. Among them, display backplane, thin film transistor (TFT) array would be the most attractive application. Many researchers have been investigating oxide semiconductors for transparent channel material of TFT since the report for transparent amorphous oxide semiconductor (TAOS) TFT by Hosono group and ZnO TFT by Wager group. Especially, oxide TFTs have been intensively investigated during a couple of years since the first demonstration of ZnO-TFT driving AM-OLED. Many papers regarding the fabrication and performance of oxide TFTs, and active matrix display driven by oxide TFTs have been reported. Now lots of people have confidence in the competitiveness of oxide TFTs for the backplane of AM-Display. Especially, high mobility, uniformity, fairly good stability, and low cost process make oxide TFTs applied even to a large size AM-OLED. Last year, Samsung mobile display, former SID, reported 12" AM-OLED driven by IZGO-TFT and it seems that the remained issue for the mass production is the bias temperature stability. Here, we will introduce the application of oxide TFT and important issue for oxide TFT to be used for the direct printing.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.543-543
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• 2013

Thin-film transistors (TFTs) based on oxide semiconductors have been regarded as promising alternatives for conventional amorphous and polycrystalline silicon TFTs. Oxide TFTs have several advantages, such as low temperature processing, transparency and high field-effect mobility. Lots of oxide semiconductors for example ZnO, SnO2, In2O3, InZnO, ZnSnO, and InGaZnO etc. have been researched. Particularly, zinc-tin oxide (ZTO) is suitable for channel layer of oxide TFTs having a high mobility that Sn in ZTO can improve the carrier transport by overlapping orbital. However, some issues related to the ZTO TFT electrical performance still remain to be resolved, such as obtaining good electrical contact between source/drain (S/D) electrodes and active channel layer. In this study, the bottom-gate type ZTO TFTs with staggered structure were prepared. Thin films of ZTO (40 nm thick) were deposited by DC magnetron sputtering and performed at room temperature in an Ar atmosphere with an oxygen partial pressure of 10%. After annealing the thin films of ZTO at $400^{\circ}C$ or an hour, Cu, Mo, ITO and Ti electrodes were used for the S/D electrodes. Cu, Mo, ITO and Ti (200 nm thick) were also deposited by DC magnetron sputtering at room temperature. The channel layer and S/D electrodes were defined using a lift-off process which resulted in a fixed width W of 100 ${\mu}m$ and channel length L varied from 10 to 50 ${\mu}m$. The TFT source/drain series resistance, the intrinsic mobility (${\mu}i$), and intrinsic threshold voltage (Vi) were extracted by transmission line method (TLM) using a series of TFTs with different channel lengths. And the performances of ZTO TFTs were measured by using HP 4145B semiconductor analyzer. The results showed that the Cu S/D electrodes had a high intrinsic field effect mobility and a low effective contact resistance compared to other electrodes such as Mo, ITO and Ti.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.534-536
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• 2009

We have fabricated solution-processed zinc-tin oxide thin film transistors (TFTs) and simple circuits on glass substrates. We report a solutionprocessed zinc-tin oxide TFTs on silicon wafer with mobility greater than 9 $cm^2/V{\cdot}s$ (W/L = 100/5 ${\mu}m$) and threshold voltage variation of less than 1 V after bias-stressing. Also, we fabricated solution-processed zinc-tin oxide circuits including inverters and 7-stage ring oscillators fabricated on glass substrates using the developed zinc-tin oxide TFTs.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1047-1050
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• 2009

The two approaches to improve the stability of oxide TFTs are described. First approach is the optimization of device architecture including MIS structure and passivation layer using conventional InGaZnO semiconductor channel layer. Second approach is to develop the new kinds of oxide semiconductor materials, which is very robust and stable against the gate bias stress and thermal stress.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.8-8
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• 2009

Thin-film transistors (TFTs) were fabricated using amorphous indium gallium zinc oxide (a-IGZO) channels by rf-magnetron sputtering at room temperature. We have studied the effect of oxygen partial pressure on the threshold voltage($V_{th}$) of a-IGZO TFTs. Interestingly, the $V_{th}$ value of the oxide TFTs are slightly shifted in the positive direction due to increasing $O_2$ ratio from 1.2 to 1.8%. The device performance is significantly affected by varying $O_2$ ratio, which is closely related with oxygen vacancies provide the needed free carriers for electrical conduction.

• Transactions on Electrical and Electronic Materials
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• v.11 no.6
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• pp.253-256
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• 2010

Different active layer thicknesses for zinc oxide (ZnO) bottom-contact thin-film transistors (TFTs) were fabricated with a poly-4-vinyphenol polymeric dielectric using injector type atomic layer deposition. The properties of the ZnO TFTs were influenced by the active thickness and width-to-length (W/L) ratio of the device. The threshold voltage of ZnO TFTs shifted positively as the active layer thickness decreased, while the subthreshold slope decreased. The W/L ratio of ZnO TFTs also affected the mobility and subthreshold slope. An optimized TFT structure exhibited an on-tooff current ratio of above 106 with solid saturation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.7
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• pp.413-416
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• 2017

We investigated solution-processed indium-yttrium-oxide (IYO) TFTs using apoly (methyl methacrylate) (PMMA) passivation layer. The IYO semiconductor solution was prepared with 0.1 M indium nitrate hydrate and 0.1 M yttrium acetate dehydrate as precursor solutions. The solution-processed IYO TFTs showed good performance: field-effect mobility of $13.13cm^2/Vs$, a threshold voltage of 8.2 V, a subthreshold slope of 0.93 V/dec, and a current on-to-off ratio of $7.2{\times}10^6$. Moreover, the PMMA passivation layers used to protectthe IYO active layer of the TFTs, did so without deteriorating their performance under ambient conditions; their operational stability and electrical properties also improved by decreasing leakage current.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.180-180
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• 2010

Thin film transistors (TFTs) based on oxide semiconductors have emerged as a promising technology, particularly for active-matrix TFT-based backplanes. Currently, an amorphous oxide semiconductor, such as InGaZnO, has been adopted as the channel layer due to its higher electron mobility. However, accurate and repeatable control of this complex material in mass production is not easy. Therefore, simpler polycrystalline materials, such as ZnO and $SnO_2$, remain possible candidates as the channel layer. Inparticular, ZnO-based TFTs have attracted considerable attention, because of their superior properties that include wide bandgap (3.37eV), transparency, and high field effect mobility when compared with conventional amorphous silicon and polycrystalline silicon TFTs. There are some technical challenges to overcome to achieve manufacturability of ZnO-based TFTs. One of the problems, the stability of ZnO-based TFTs, is as yet unsolved since ZnO-based TFTs usually contain defects in the ZnO channel layer and deep level defects in the channel/dielectric interface that cause problems in device operation. The quality of the interface between the channel and dielectric plays a crucial role in transistor performance, and several insulators have been reported that reduce the number of defects in the channel and the interfacial charge trap defects. Additionally, ZnO TFTs using a high quality interface fabricated by a two step atomic layer deposition (ALD) process showed improvement in device performance In this study, we report the fabrication of high performance ZnO TFTs with a $Si_3N_4$ gate insulator treated using plasma. The interface treatment using electron cyclotron resonance (ECR) $O_2$ plasma improves the interface quality by lowering the interface trap density. This process can be easily adapted for industrial applications because the device structure and fabrication process in this paper are compatible with those of a-Si TFTs.