• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.6
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• pp.517-525
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• 2015

A grid connected inverter must be operated as the main electricity source under an isolated condition caused by the grid problem. Conventionally, the dual loop controller is used for the grid inverter, and the controller is used for control under the stand-alone mode. Generally, the PI(Proportional - Integral) controller is highly efficient under a synchronous reference frame, and stable control can be available. However, in this synchronous frame-based control, high-quality DSP is required because many sinusoidal calculations are necessary. When the PI control is conducted under a stationary frame, the controller constructions are made simple so that they work even with a low-price micro controller. However, given the characteristics of the PI controller, it should be designed with the phase of reference voltage considered. Otherwise, the phase delay of the output voltage can occur. Although the current controller also has a higher bandwidth than the voltage controller, distortion of the voltage is difficult to avoid only by the rapid response of the PI controller, as a sudden load change can occur in the nonlinear load. In this study, a new control method that solves the voltage controller bandwidth problem and rapidly copes with it even in the nonlinear load situation is proposed. The validity of the proposed method is proved by simulation and experimental results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.7
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• pp.545-551
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• 2013

Timing recovery loop composed of the Timing Error Detector(TED), loop filter and resampler is widely used for the timing synchronization in MQASK receivers. Since TED is sensitive to the delay between the symbol period of the signal and sampling period, the output is averaged out when the symbol rate and sampling rate are quite different the recovery loop cannot work at all. This paper presents a sampling frequency discriminator (SRD), which detects the frequency offset of the sampling clock to the symbol clock of the MQASK data transmitted. Employing the SRD, the closed loop timing recovery scheme performs the frequency-aided timing acquisition and achieve the synchronization at extremely high sampling frequency offset, which can be used in variable symbol rate MQASK receivers.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.2116-2118
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• 2000

In the technique of Q-switching, very fast electronically controlled optical shutters can be made by using the electro-optic effect in crystals or liquids. The driver for the Pockels cell must be a high-speed, high-voltage switch which also must deliver a sizeable current. Common switching techniques include the use of vacuum tubes, cold cathode tubes, thyratrons, SCRs, and avalanche transistors. Semiconductor devices such as SCRs, avalanche transistors, and MOSFETs have been successfully employed to drive Pockels cell Q-switch. In this study, a simple driver for the Pockels cell Q-switch was developed by using SCRs, pulse transformer and TTL ICs. The Pockels cell Q-switch which was operated by this driver was employed in pulsed Nd:YAG laser system to investigate the operating characteristics of this Q-switch. And we have investigated the output characteristics of this Q-switch as a function of the Q-switch delay time to Xe flashlamp current on.

• Journal of the Korea Society of Computer and Information
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• v.18 no.2
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• pp.9-17
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• 2013

In this paper, we propose a new multiplication algorithm for two polynomials using primitive polynomial with all 1 of coefficient on finite fields GF($2^m$), and design the multiplier with high-speed parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $m^2$ same basic cells that have a 2-input XOR gate and a 2-input AND gate. Since the basic cell have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $D_A+D_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.

• Journal of the Semiconductor & Display Technology
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• v.7 no.1
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• pp.1-5
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• 2008

In this paper, we fabricated pressure difference type gas flow sensor using only dry etching technology by ICP-RIE(inductive coupled plasma reactive ion etching). The sensor's structure consists of a common shear stress type piezoresistive pressure sensor with an orifice fabricated in the middle of the sensor diaphragm. Generally, structure like diaphragm is fabricated by wet etching technology using TMAH, but we fabricated diaphragm by only dry etching using ICP-RIE. To equalize the thickness of diaphragm we applied insulator($SiO_2$) layer of SOI(Si/$SiO_2$/Si-sub) wafer as delay layer of dry etching. Size of fabricated diaphragm is $1000{\times}1000{\times}7\;{\mu}m^3$ and overall chip $3000{\times}3000{\times}7\;{\mu}m^3$. We measured the variation of output voltage toward the change of gas pressure to analyze characteristics of the fabricated sensor. Sensitivity of fabricated sensor was relatively high as about 1.5mV/V kPa at 1kPa full-scale. Nonlinearity was below 0.5%F.S. Over-pressure range of the fabricated sensor is 100kPa or more.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.41 no.6
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• pp.17-25
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• 2004

In this paper, we propose a new small swing domino logic for low-power consumption. To reduce the power consumption, both the precharge node and the output node swing the range from 0 to $V_{REF}$- $V_{THN}$, where $V_{REF}$=VDD-n $V_{THN}$ (n=1, 2, and 3). This can be done by adding the inverter structure on domino logic that allows a full swing or a small swing on its input terminal without leakage current. Compared to previous works, the proposed structure can save the power consumption of more than 30% for n=0, 1, 2, and 3 in the equation of $V_{REF}$=VDD-n $V_{THN}$. A multiplier applying the proposed domino logic has been designed and fabricated using a 0.35-${\mu}{\textrm}{m}$ n-well CMOS process under 3.3-V supply voltage. Compared with other previous works, it shows a 30% power reduction and a better feature in power-delay product.lay product.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.10
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• pp.67-74
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• 2007

Turbo code, a kind of channel coding technique, has ben used in the field of digital mobile communication system if the number of iterations is increased in the several channel environments, my further iteration results in very little improvement, and requires much delay and computation in proportion to the number of iterations. In this paper, it proposes an efficient stopping rules for the iteration process in turbo decoding. By using absolute mean values for the LLR difference values between the first and second decoder in the present decoding process, the proposed algorithm can largely reduce the average number of iterations without BER performance degradation in all SNR regions. As a result of simulation, the average number of iterations of proposed algorithm is reduced by about $18.25%{\sim}20.58%$ compared to SDR algerian in the lower SNR region, and is reduced by about $22.96%{\sim}28.74%$ compared to method using variance values of extrinsic information in the upper SNR region.

• Journal of the Korea Society of Computer and Information
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• v.10 no.3 s.35
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• pp.11-18
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• 2005

In this paper, we propose a new technology mapping algorithm for CPLD consider area under time constraint. This algorithm detect feedbacks from boolean networks, then variables that have feedback are replaced to temporary variables. Creating the temporary variables transform sequential circuit to combinational circuit. The transformed circuits are represented to DAG. After traversing all nodes in DAG, the nodes that have output edges more than two are replicated and reconstructed to fanout free tree. Using time constraints and delay time of device, the number of graph partitionable multi-level is decided. Several nodes in partitioned clusters are merged by collapsing, and are fitted to the number of OR-terms in a given CLB by bin packing. Proposed algorithm have been applied to MCNC logic synthesis benchmark circuits, and have reduced the number of CLBs by $62.2\%$ than those of DDMAP. And reduced the number of CLBs by $17.6\%$ than those of TEMPLA.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.5C
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• pp.395-402
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• 2008

In this paper, an I/Q channel 12bits 40MS/s Pipeline Analog to Digital Converter that is able to apply to WLAN/WMAN system is proposed. The proposed ADC integrates DLL based duty-correction circuit which corrects the fluctuations in the duksty cycle caused by miniaturization of CMOS devices and faster operating speeds. It is designed as a 1% to 99% input clock duty cycle could be corrected to 50% output duty cycle. The prototype ADC is implemented in a $0.18{\mu}m$ CMOS n-well 1-poly 6-metal process and dissipates 184mW at 1.8V single supply The SNDR of the proposed 12bit ADC is 52dB and SFDR of 59dBc(@Fs=20MHz, Fin=1MHz) is measured.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.2
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• pp.395-400
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• 2017

The paper discussed the air-to-fuel ratio control of automotive fuel-injection systems using the cerebellar model articulation controller(CMAC) neural network. Because of the internal combustion engines and fuel-injection's dynamics is extremely nonlinear, it leads to the discontinuous of the fuel-injection and the traditional method of control based on table look up has the question of control accuracy low. The advantages about CMAC neural network are distributed storage information, parallel processing information, self-organizing and self-educated function. The unique structure of CMAC neural network and the processing method lets it have extensive application. In addition, by analyzing the output characteristics of oxygen sensor, calculating the rate of fuel-injection to maintain the air-to-fuel ratio. The CMAC may easily compensate for time delay. Experimental results proved that the way is more good than traditional for petrol control and the CMAC fuel-injection controller can keep ideal mixing ratio (A/F) for engine at any working conditions. The performance of power and economy is evidently improved.